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三维集成电路测试方法

更新时间:2020-07-31 05:54:46 大小:466K 上传用户:守着阳光1985查看TA发布的资源 标签:集成电路 下载积分:5分 评价赚积分 (如何评价?) 打赏 收藏 评论(0) 举报

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制造技术的不断发展使集成电路工业已达到深亚微米级,以TSV技术为基础的三维集成电路解决了器件间互连线长度过长的问题,成为一种具有众多优势极具竞争力的技术。综述基于TSV的三维集成电路测试的新特点,阐述以TSV技术为中心的三维IC的优势,介绍适用于三维IC的测试方法,分类阐述实现此种新技术所需要解决的难题。

The rapid development of manufacturing technology has made it possible for semiconductor industry to enter the era of Very Deep SubMicron. TSV technology based 3D IC overcome the difficulties of over-long interconnect between each components of IC, therefore becoming an emerging and competitive technique and gains popularity among researchers and developers in related work of rviews the new characteristics of testing and for TSV centered 3D IC, introduces the advantages of 3D IC, and expounds various challenging problems confronted by researchers. Analyses the testing methods suitable for 3D IC and the challenges that must be tackled by the researchers are elaborated in detail.

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三维集成电路测试方法.pdf 466K

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