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四通道数字下变频器ASIC设计
资料介绍
数字下变频（DDC）是将中频信号数字下变频至零中频且使信号速率下降至适合通用DSP器件处理速率的技术，广泛应用于通信和雷达的数字化接收机中。本文介绍了自主设计的四通道多抽取率数字下变频器ASIC设计，此芯片输入四通道的串行AD采样数据，输出四路经过DDC处理的正交信号。仿真验证了芯片前端设计的正确性。
Digital down converting （ DDC） is a kind of technique that is used to perform down conversion of IF signal digitally to zero IF signal and make speed of signal descend to suitable processing speed of general DSP device. It is now widely used in communication and digitalization radar receiver. The independently designed four-channel multiple decimation DDC based on ASIC （ Application Specific Integrated Circuit） is presented. The four-channel serial AD sampling data is input to the ASIC chip and four-channel DDC processed orthogonal signal is delivered. The simulation results validate correctness of the chip front-end design.
部分文件列表
| 文件名 | 大小 |
| 四通道数字下变频器ASIC设计.pdf | 882K |
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