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ICN6202规格书V10

更新时间:2020-02-14 15:49:48 大小:874K 上传用户:lsj52058查看TA发布的资源 标签:icn6202 下载积分:1分 评价赚积分 (如何评价?) 收藏 评论(2) 举报

资料介绍

ICN6201/02 is a bridge chip which receives MIPI® DSI inputs and sends LVDS outputs.

MIPI® DSI supports up to 4 lanes and each lane operates at 1Gbps maximum; the totally maximum input

bandwidth is 4Gbps; and the MIPI defined ULPS(ultra-low-power state) is also supported. ICN6201 decodes

MIPI® DSI 18bepp RGB666 and 24bpp RGB888 packets.

The LVDS output 18 or 24 bits pixel with 25MHz to 154MHz, by VESA or JEIDA format.

ICN6201/02 support video resolution up to FHD (1920x1080) and WUXGA (1920x1200).

ICN6201 adopts QFN48 package and ICN6202 adopts QFN40 package


部分文件列表

文件名 大小
ICN6202规格书V10.pdf 874K

全部评论(2)

  • 2023-07-19 18:12:36方会兵

    如果有 ICN6202硬件参考设计就OK了

  • 2022-07-20 14:59:48hitsdklz

    谢谢资料分享