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一种利用缓存技术降低视频编解码芯片外部访问带宽的方法
资料介绍
降低视频编解码芯片外部访问带宽是视频编解码芯片架构设计的一个重要挑战。针对视频编解码的去方块滤波算法（DBK）阶段,利用片上SRAM缓存技术,有效地降低了芯片外存访问带宽。根据多种视频编解码标准,包括HEVC、H.264、AVS2等,给出了所需片上缓存的大小映射公式,和芯片外存访问带宽降低的理论值和实验值。
Reducing the external access bandwidth of video codec chip is an important challenge in the design of video codec chip architecture. In view of the video coding and decoding algorithm of deblocking filter（DBK）, the on-chip SRAM cache technology is used to effectively reduce the memory access bandwidth of chip. According to a variety of video codec standards, including HEVC, H.264, AVS2, and so on, the size mapping formula of the required caching is given, and the theoretical value and experimental value of the chip external memory access bandwidth reduction are also given.
部分文件列表
| 文件名 | 大小 |
| 一种利用缓存技术降低视频编解码芯片外部访问带宽的方法.pdf | 1M |
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