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用于图像传感器的扩展计数模数转换器设计
资料介绍
扩展计数（extended counting）模数转换器（ADC）合并了Sigma-Delta（ΣΔ）ADC的高精度和奈奎斯特率ADC的高速低功耗优势,具有中高精度和中等的转换速度,在图像传感器方面具有很好的应用前景。以ΣΔADC与逐次逼近（SAR）ADC的组合结构的扩展计数ADC为例,基于0.35μm的CMOS工艺,对其进行了电路层面的设计。通过电路级仿真验证了该工艺下ADC的功能并且得到了部分的性能参数。
The extended counting analog-to-digital converter （ADC） combines the accuracy of ∑AADC and the speed and power consumption of Nyquist-rate ADC. It has a good application foreground for its high resolution with a medium conversion speed. The combination of ∑AADC and successive approximation register （SAR） ADC has been chosen as the structure of extended counting ADC, and the extended counting ADC has been designed and simulated based on the 0.35 μm CMOS technology. The extended counting ADC has been verified and some properties have been given by the simulation.
部分文件列表
| 文件名 | 大小 |
| 用于图像传感器的扩展计数模数转换器设计.pdf | 653K |
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