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CAN BUS总线的FPGA实现源代码(Verilog语言)
资料介绍
CAN BUS总线的FPGA实现源代码(Verilog语言)
部分文件列表
| 文件名 | 文件大小 | 修改时间 |
| can_acf.v | 14KB | 2005-04-12 09:10:28 |
| can_bsp.v | 51KB | 2005-04-12 09:10:02 |
| can_btl.v | 6KB | 2005-04-12 09:13:14 |
| can_crc.v | 1KB | 2005-04-12 09:10:44 |
| can_defines.v | 1KB | 2005-04-13 23:51:52 |
| can_fifo.v | 8KB | 2005-04-12 09:11:04 |
| can_ibo.v | 1KB | 2005-04-12 09:12:50 |
| can_register.v | 1KB | 2005-04-12 09:13:56 |
| can_register_asyn.v | 1KB | 2005-04-12 09:14:16 |
| can_register_asyn_syn.v | 1KB | 2005-04-12 09:14:34 |
| can_register_syn.v | 1KB | 2005-04-13 23:51:38 |
| ... | ||
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