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组合逻辑电路设计与仿真
资料介绍
组合逻辑电路,可通过传统方法进行设计,也可通过计算机仿真软件Multisim进行设计,同时还可利用该仿真软件对所设计的电路进行验证,其操作简单,使用方便,文章以多数表决器为例进行设计和仿真.
Apart from traditional way, combinational logic circuits can also be designed through computer simulation softwareMultisim, which could be used to test the designed circuits as well. Multisim is easy to operate and implement. This paper designedand simulated combinational logic circuits with an example of majority voter.
部分文件列表
| 文件名 | 大小 |
| 组合逻辑电路设计与仿真.pdf | 1M |
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