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基于FPGA的三模冗余UART电路设计
资料介绍
针对在星载复杂空间环境下UART（universal asynchronous receiver/transmitter）电路有可能发生单粒子翻转导致通信失效的问题,研究了基于反熔丝型FPGA的三模冗余UART电路设计方法。根据UART异步串行收发电路的功能特点,提出了采用反熔丝型的FPGA,将电路的核心功能嵌入到FPGA内部,用硬件描述语言VHDL开发各个模块,对UART异步串口收发电路的关键部分进行了三模冗余设计,提高了系统的可靠性。进一步,给出了异步串行该收发电路的工作原理、实现框图、资源分析,仿真结果验证了该方法的有效性。此设计方法已经成功应用于某系统中,试验证明该UART电路设计占用资源少、工作稳定可靠。
In the complex space environment of onboard system,SEU（Single Event Upset） may occur in UART（Universal Asynchronous Receiver Transmitter） circuit,which may lead the communication to failure.To address this issue,presents a TMR UART circuit design based on anti-fuse FPGA.Based on the features of UART asynchronous serial transceiver circuit,the asynchronous/serial port transceiver circuit TMR design which embedded into the anti-fuse FPGA and programmed in VHDL language is proposes in this paper.The working principle,the block diagram and the resource analysis of the designed asynchronous/serial transceivers circuit are also given in...
部分文件列表
| 文件名 | 大小 |
| 基于FPGA的三模冗余UART电路设计.pdf | 277K |
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