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ALTERA cyclone4_handbook 硬件技术手册 -488页

更新时间:2020-06-29 07:37:15 大小:18M 上传用户:xzxbybd查看TA发布的资源 标签:cyclone 下载积分:2分 评价赚积分 (如何评价?) 打赏 收藏 评论(0) 举报

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ALTERA cyclone4_handbook 硬件技术手册 -488页


IV Device Family Features

The Cyclone IV device family offers the following features:

■ Low-cost, low-power FPGA fabric:

■ 6K to 150K logic elements

■ Up to 6.3 Mb of embedded memory

■ Up to 360 18 × 18 multipliers for DSP processing intensive applications

■ Protocol bridging applications for under 1.5 W total power

■ Cyclone IV GX devices offer up to eight high-speed transceivers that provide:

■ Data rates up to 3.125 Gbps

■ 8B/10B encoder/decoder

■ 8-bit or 10-bit physical media attachment (PMA) to physical coding sublayer

(PCS) interface

■ Byte serializer/deserializer (SERDES)

■ Word aligner

■ Rate matching FIFO

■ TX bit slipper for Common Public Radio Interface (CPRI)

■ Electrical idle

■ Dynamic channel reconfiguration allowing you to change data rates and

protocols on-the-fly

■ Static equalization and pre-emphasis for superior signal integrity

■ 150 mW per channel power consumption

■ Flexible clocking structure to support multiple protocols in a single transceiver

block

■ Cyclone IV GX devices offer dedicated hard IP for PCI Express (PIPE) (PCIe)

Gen 1:

■ ×1, ×2, and ×4 lane configurations

■ End-point and root-port configurations

■ Up to 256-byte payload

■ One virtual channel

■ 2 KB retry buffer

■ 4


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cyclone4_handbook.pdf 18M

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