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TI C2000系列DSP，TMS320F28335的芯片手册

更新时间：2019-10-09 19:09:23 大小：3M 上传用户：y1271700857查看TA发布的资源 标签：dspC2000 下载积分：1分 评价赚积分 （如何评价?） 打赏 收藏 评论(2) 举报

资料介绍

TI公司的C2000系列DSP，TMS320F28335的芯片资料

TMS320F2833x, TMS320F2823x Digital Signal Controllers (DSCs)

部分文件列表

文件名 大小
tms320f28335DataSheet-20170801.pdf 3M

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部分页面预览

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SPRS439N –JUNE 2007–REVISED OCTOBER 2016  
TMS320F2833x, TMS320F2823x Digital Signal Controllers (DSCs)  
1 Device Overview  
1.1 Features  
1
• High-Performance Static CMOS Technology  
– Up to 150 MHz (6.67-ns Cycle Time)  
– 1.9-V/1.8-V Core, 3.3-V I/O Design  
• Enhanced Control Peripherals  
– Up to 18 PWM Outputs  
– Up to 6 HRPWM Outputs With 150 ps MEP  
Resolution  
• High-Performance 32-Bit CPU (TMS320C28x)  
– Up to 6 Event Capture Inputs  
– Up to 2 Quadrature Encoder Interfaces  
– IEEE 754 Single-Precision Floating-Point Unit  
(FPU) (F2833x Only)  
– 16 × 16 and 32 × 32 MAC Operations  
– 16 × 16 Dual MAC  
– Harvard Bus Architecture  
– Fast Interrupt Response and Processing  
– Unified Memory Programming Model  
– Code-Efficient (in C/C++ and Assembly)  
– Up to 8 32-Bit Timers  
(6 for eCAPs and 2 for eQEPs)  
– Up to 9 16-Bit Timers  
(6 for ePWMs and 3 XINTCTRs)  
• Three 32-Bit CPU Timers  
• Serial Port Peripherals  
– Up to 2 CAN Modules  
• Six-Channel DMA Controller (for ADC, McBSP,  
ePWM, XINTF, and SARAM)  
• 16-Bit or 32-Bit External Interface (XINTF)  
– More Than 2M × 16 Address Reach  
• On-Chip Memory  
– Up to 3 SCI (UART) Modules  
– Up to 2 McBSP Modules (Configurable as SPI)  
– One SPI Module  
– One Inter-Integrated Circuit (I2C) Bus  
• 12-Bit ADC, 16 Channels  
– F28335, F28333, F28235:  
256K × 16 Flash, 34K × 16 S
– 80-ns Conversion Rate  
– F28334, F28234:  
– 2 × 8 Channel Input Multiplexer  
– Two Sample-and-Hold  
128K × 16 Flash, 34K × 16 SARAM  
– F28332, F28232:  
– Single/Simultaneous Conversions  
– Internal or External Reference  
• Up to 88 Individually Programmable, Multiplexed  
GPIO Pins With Input Filtering  
64K × 16 Flash, 26K × 16 SARAM  
– 1K × 16 OTP ROM  
• Boot ROM (8K × 16)  
– With Software Boot Modes (Through SCI, SPI,  
CAN, I2C, McBSP, XINTF, and Parallel I/O)  
– Standard Math Tables  
• Clock and System Control  
– On-Chip Oscillator  
– Watchdog Timer Module  
• GPIO0 to GPIO63 Pins Can Be Connected to One  
of the Eight External Core Interrupts  
• JTAG Boundary Scan Support  
– IEEE Standard 1149.1-1990 Standard Test  
Access Port and Boundary Scan Architecture  
• Advanced Emulation Features  
– Analysis and Breakpoint Functions  
– Real-Time Debug Using Hardware  
• Development Support Includes  
– ANSI C/C++ Compiler/Assembler/Linker  
– Code Composer Studio™ IDE  
– DSP/BIOS™ and SYS/BIOS  
• Peripheral Interrupt Expansion (PIE) Block That  
Supports All 58 Peripheral Interrupts  
• 128-Bit Security Key/Lock  
– Digital Motor Control and Digital Power Software  
Libraries  
– Protects Flash/OTP/RAM Blocks  
– Prevents Firmware Reverse Engineering  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 

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