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LENOVO Y410P NM-A031 电路原理图

更新时间:2019-12-17 00:01:09 大小:1M 上传用户:minihts查看TA发布的资源 标签:lenovo 下载积分:2分 评价赚积分 (如何评价?) 打赏 收藏 评论(0) 举报

资料介绍

LENOVO Y410P NM-A031,电路原理图.

部分文件列表

文件名 大小
LENOVO_Y410P_NM-A031.pdf 1M

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VIQY0  
(Y410)  
NM_A031 Rev1.0 Schematic  
Intel Haswell Processor with DDRIII + Lynx point PCH  
nVIDIA N14P GT + 2nd VGA N14P GT  
2013-03-19 Rev1.0  
Title  
Security Classification  
Issued Date  
LC Future Center Secret Data  
Deciphered Date  
Cover Page  
2014/07/01  
2012/07/01  
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL  
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D  
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS  
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.  
Size  
Custom  
Document Number  
Rev  
1.0  
Wednesday, March 27, 2013  
Date:  
Sheet  
E
1
of  
69  
A
B
C
D
A
B
C
D
E
PCI-Express 16X Gen3  
Intel CPU  
Haswell  
PEG 8~15  
PEG 0~7  
Memory BUS (DDRIII)  
Dual Channel  
DDR3-SO-DIMM X2  
BANK 0, 1, 2, 3  
2nd VGA, N14P-GT1  
N14P-GT1  
1
2
3
4
1
2
3
4
rPGA-946  
37.5mm*37.5mm  
VRAM 64*32  
GDDR5* 8  
VRAM 64*32  
GDDR5* 8  
1.35V DDRIIIL 1066/1333/1600 MT/s  
UP TO 16G  
Page 32  
Page 23,24,25,26,27,28,29,30,31  
Sub/B  
Page 5,6,7,8,9,10,11  
HDMI  
MUX  
Page 37  
DMI *4  
5GT/s  
CRT  
HDMI Conn.  
CRT Conn.  
MUX  
Page 37  
Page 39  
Page 36  
HDMI1.4b  
eDP  
eDP  
USB Charger IC  
USB Charger  
Conn.  
Sub/B  
LVDS  
eDP to LVDS  
PS8625  
USB 2.0 Port5  
LVDS Conn.  
MUX  
GL887T  
5V 480MHz  
Page 35  
Page 34  
Page 38  
Page 51  
Page 51  
Atheros  
QCA8171-AL3A-R  
Intel PCH  
Lynx point  
PCIe Gen1  
1.5V 5GT/s  
RJ45 Conn.  
USB Left  
USB 2.0 Port 2  
USB 3.0 Port 2  
USB Right  
USB 2.0 Port 1  
USB 2.0  
Page 42  
Page 41  
PCIe port 3  
5V 480MHz  
Page 50  
Page 50  
Sub/B  
SPI ROM  
(4MB+2MB)  
SPI BUS  
3.3V 33MHz  
Int. Camera  
USB 2.0 Port 0  
Touch panel  
USB 2.0 Port 8  
Page 17  
USB 3.0  
695 ball FCBGA  
20mm*20mm  
5V 5GT/s  
Page 35  
Page 51  
SATA HDD  
SATA Gen3 Port 1  
5V 6GHz(600MB/s)  
SATA Port 5  
page 44  
USB 2.0  
PCIeMini Card  
WLAN  
mSATA SSD  
SATA ODD  
5V 480MHz  
SATA Gen1 Port2  
5V 3GHz(300MB/s)  
SATA Port 2  
page 44  
PCIe Port 4  
page 40  
SATA Port 4  
page 40  
PCIe Gen1  
5V 480MHz  
PCIeMini Card  
WLAN  
USB 3.0 Port6  
5V 5GT/s  
SATA Gen3  
Card reader  
Card reader IC  
USB 2.0 Port 10  
page 40  
5V 6GHz(600MB/s)  
GL3213  
USB 2.0 Port4  
5V 480MHz  
Conn.  
Page 14,15,16,17,18,19,20,21,22  
Page 49  
Page 49  
HD Audio  
LPC BUS  
3.3V 33MHz  
3.3V 24MHz  
Debug Port  
EC  
ITE IT8586E-AX  
Codec  
ALC282CG  
AMP  
MAX98400B  
Page 46  
SPK Conn.  
Page 47  
Page 46  
Page 45  
Page 47  
Power Circuit DC/DC  
Page 56,57,58,59,60,61,  
62,63,64,65,66  
Int. MIC Conn.  
(JCMOS Conn.)  
Page 35  
DC/DC Interface CKT.  
RTC CKT.  
Thermal Sensor  
EMC 1403  
Page 43  
Ext. MIC Conn.  
HP Conn.  
Touch Pad  
Int.KBD  
Page 55  
Page 56  
Page 51  
Page 51  
Sub/B  
Sub/B  
Page 48  
Page 48  
POWER/B Conn.  
AUDIO, USB/B Conn.  
Page 51  
Title  
Security Classification  
Issued Date  
LC Future Center Secret Data  
Deciphered Date  
Page 53  
Block Diagram  
2014/07/01  
2012/07/01  
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL  
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D  
Size Document Number  
Custom  
Rev  
1.0  
ODD/B Conn.  
NOVO/B Conn.  
Page 53  
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS  
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.  
page 44  
Wednesday, March 27, 2013  
Date:  
Sheet  
2
of  
69  
A
B
C
D
E

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