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一种嵌入式上电复位电路的设计与芯片实现

更新时间:2020-07-31 11:42:14 大小:834K 上传用户:xiaohei1810查看TA发布的资源 标签:嵌入式复位电路设计芯片 下载积分:5分 评价赚积分 (如何评价?) 收藏 评论(0) 举报

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在芯片上电过程中,需要复位电路提供一个复位信号,保证系统正常启动。为了解决传统电路中起拉电压和复位时间较难控制等问题,提出一种利用反相器翻转电压设置起拉电压、电容控制复位时间的新型结构。该上电复位电路在MXIC0.5μmCMOS工艺上得以验证实现。测试结果表明在正负电源分别为0V和-5V的情况下,电路的起拉电平为-4.5V,复位时间为3.44ms,满足工程要求。

During the process of charging the chip with electricity, a reset signal of the pow- er-on reset circuit is needed to guarantee normal work of the chip. In order to solve the problems in traditional power-on reset circuits such as hard to control the pull level and reset time and so forth, a new structure which uses the inverter trigging signal to set pull level and control the re- set time with the capacitances was proposed in this paper. This power-on reset circuit was veri- fied in MXIC 0. 5 μm CMOS technology. And the test result indicated that the circuit pull level is -4.5 V, and the reset time is 3.44 ms with 0 V positive and -5 V negative power. So this cir- cuit can meet the engineering requirements well.

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一种嵌入式上电复位电路的设计与芯片实现.pdf 834K

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