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低功耗射频设计的版图评审技术的详细资料说明

更新时间：2019-12-12 08:18:51 大小：352K 上传用户：梦留香查看TA发布的资源 标签：低功耗射频 下载积分：2分 评价赚积分 （如何评价?） 打赏 收藏 评论(0) 举报

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在无线电频率下，射频信号的波长可以与网络的物理尺寸相媲美，传输线可以是网络的一个可忽略的部分。在这种情况下，集总元件模型不再适用，考虑分布模型来解释幅度和相移变得很重要在传输线长度上的信号〔1〕。如果不是，反射会发生，并且在设计中的各个阶段之间的功率传输中会造成显著的损耗（回波损耗）。阻抗变换是最大功率转移的关键。此外，各元件的电磁辐射和电容耦合会导致意外损耗，这也可能会显著改变电路的性能，在设计时必须加以考虑。TILPRF参考设计的设计要考虑到所有这些效果以获得最佳性能，建议在任何需要的应用中准确/接近地复制。

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Application Note AN098  
Layout Review Techniques for Low Power RF Designs  
By Suyash Jain  
Keywords  
Layout Review Techniques  
Board Stacking for RF Design  
CC1020, CC1021  
CC1100E, CC1101, CC1110, CC1111,  
CC1150  
CC2500, CC2520, CC2510, CC2530,  
CC2533  
CC430  
CC2420, CC2430, CC2431, CC2480  
1 Introduction  
At radio frequencies, the wavelength of  
the RF signal can become comparable to  
the physical dimensions of the network  
The purpose of this application note is to  
provide guidelines to copy successfully the  
reference designs for TI CCXXXX LPRF  
devices. This application note also  
illustrates important RF PCB design  
concepts for a successful RF PCB layout.  
It provides steps to lay out an RF PCB and  
review the final design before sending it to  
and transmission lines can be  
a
considerable fraction of the network.  
Lumped element models in such cases  
can no longer be applied, and it becomes  
important to consider the distributed  
models to account for the magnitude and  
phase shift of the signal over the length of  
the transmission lines [1]. If not, reflections  
occur and can cause significant loss  
(return loss) in the power transfer between  
various stages in a design. Impedance  
matching is critical for maximum power  
transfer. Additionally, electromagnetic  
radiation and capacitive coupling among  
the elements causes unintentional losses  
that may also significantly alter the  
performance of the circuit and must be  
considered while laying out the design. TI  
LPRF reference designs are designed  
taking into consideration all these effects  
for optimum performance and are  
recommended to be copied exactly/closely  
for any required application.  
the  
manufacturer.  
These  
recommendations will assist having a  
working design on the first prototype. The  
application  
note  
then  
discusses  
commonly-made PCB design mistakes  
that will provide designers  
understanding of things not to do.  
a
clear  
SmartRFTM studio is a powerful tool for  
prototyping designs; this application note  
also describes how to include a test/debug  
port in the prototype design for easy and  
quick radio performance testing.  
SmartRF is a Trademark of Texas Instruments  
SWRA367  
Page 1 of 14  
Application Note AN098  
Table of Contents  
KEYWORDS ..........................................................................................................................................1  
1
2
3
INTRODUCTION.........................................................................................................................1  
ABBREVIATIONS .......................................................................................................................2  
BASICS OF RF PCB DESIGN ....................................................................................................3  
3.1  
3.2  
3.3  
3.4  
3.5  
3.6  
IMPEDANCE MATCHING ............................................................................................3  
TRANSMISSION LINES ................................................................................................3  
BOARD STACK-UP........................................................................................................4  
POWER SUPPLY BYPASSING AND DECOUPLING.................................................4  
GROUND PLANE ...........................................................................................................5  
COMPONENT ORIENTATION .....................................................................................6  
4
5
6
COPYING TI REFERENCE DESIGN.......................................................................................7  
DEBUG SOCKET ON THE DESIGN.........................................................................................9  
EXAMPLES OF THINGS NOT TO DO ..................................................................................10  
6.1  
LONG RF TRACE LENGTHS AND MISMATCHED TRACES IN DIFFERENTIAL  
RF SECTIONS...............................................................................................................................10  
6.2  
6.3  
6.4  
6.5  
6.6  
6.7  
DIGITAL LINES NEAR/BELOW THE RF PATH ......................................................11  
DIGITAL TRACES BELOW/NEAR THE CRYSTAL OSCILLATOR.......................11  
BYPASS CAPACITOR PLACEMENT.........................................................................11  
PCB LAYERS SWAPPED WHILE MANUFACTURING...........................................12  
SILKSCREEN BELOW THE CHIP..............................................................................13  
POWER PAD LAYOUT................................................................................................13  
7
8
9
CONCLUSION............................................................................................................................14  
REFERENCES ............................................................................................................................14  
GENERAL INFORMATION.....................................................................................................14  
9.1  
DOCUMENT HISTORY ...............................................................................................14  
2 Abbreviations  
BOM  
PCB  
PER  
RF  
SRF  
DD  
Bill of Materials  
Printed Circuit Board  
Packet Error Rate  
Radio Frequency  
Self Resonant Frequency  
Debug Data  
DC  
Debug Clock  
NC  
Not Connected  
LPRF  
Low Power RF  
SWRA367  
Page 2 of 14  

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