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基于FPGA的高精度时间测量电路的实现

更新时间:2020-10-20 01:52:37 大小:328K 上传用户:gsy幸运查看TA发布的资源 标签:fpga 下载积分:1分 评价赚积分 (如何评价?) 收藏 评论(0) 举报

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介绍了一种基于FPGA技术的TDC(Time to Digital Convertor)的实现,利用FPGA中加法器固有的进位链的延迟实现时间内插电路来完成TDC中的细计数部分。此TDC结构是一种基于最新的WUTDC(Wave Union TDC)技术,通过再次细分进位链中的超宽码来提高测量精度。经过板级测试和在线调试,证明该转换电路线性度良好,RMS精度好于40 ps。

It presents the implementing of TDC based on FPGA.The fine timing function part is accomplished through the time interpolators that are composed of the carry chain of intrinsic adders in FPGA.This architecture dates back to the latest technology-WUTDC(Wave Union TDC) that is developed to sub-divide the ultra-wide bins and improve the measure resolution.The board and the online test have been proved that the linearity of convertors is satisfying and the time resolution is better than 40 ps.

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基于FPGA的高精度时间测量电路的实现.pdf 328K

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