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高性能电流型CMOS显性脉冲触发器设计

更新时间：2020-08-29 01:05:05 大小：362K 上传用户：zhiyao6 查看TA发布的资源 标签：cmos 脉冲触发器 下载积分：5分评价赚积分（如何评价?）收藏评论(0) 举报

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提出以电流信号表示逻辑值的电流型CMOS显性脉冲触发器的设计用于低功耗高性能混合集成电路设计中,以减少存储单元开关噪声对电路性能的影响.所提出的电流型CMOS显性脉冲触发器较以往文献中电流型CMOS主从触发器和电流型CMOS边沿触发器晶体管数量分别减少11个和4个,采用TSMC 0.18μm COMS工艺参数的HSPICE模拟结果表明,所提出的电流型脉冲触发器具有正确的逻辑功能,平均延时分别减少了48.8%和57%,具有结构简单,功耗低和速度快的特性,同时该触发器可方便应用于单边沿和双边沿触发.

A novel current-mode CMOS explicit-pulsed flip-flop with one-latch （1L-EPCMFF） is proposed and its switch levels are realized in the current domain by steering a constant DC bias current. In comparison with the cur- rent-mode CMOS master-slave flip-flop （MS-CMFF） and one-latch current-mode CMOS edge-triggered flip-flop （1L-CMFF）, the 1L-EPCMFF reduces 11 and 4 transistors respectively. HSPICE simulation using TSMC 0.18 /Lm CMOS technology has shown that the proposed 1L EPCMFF has correct logic function and reduces the delay by 48.8% and 57% respectively, and has the smaller D-Q delay and lower power consumption characteristics. In addi- tion, the proposed 1L-EPCMFF can be easily incorporate...