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[AN225301]使用Excelon LP SPI F-RAM低功耗模式进行设计

更新时间：2019-11-11 08:54:18 大小：1M 上传用户：最美葫芦娃查看TA发布的资源 标签：铁电随机存储器F-RAM 下载积分：9分 评价赚积分 （如何评价?） 打赏 收藏 评论(0) 举报

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[AN225301]使用Excelon LP SPI F-RAM低功耗模式进行设计
铁电随机存储器（F-RAM），相对于其它类型的半导体技术而言，铁电随机存储器（F-RAM）具有一些独一无二的特性。已经确定的半导体存储器可以分为两类：易失性和非易失性。易失性存储器包括静态随机存取存储器（SRAM）和动态随机存取存储器（DRAM）以及其他类型存储器。RAM类型存储器易于使用，高性能，但它们有着共同的弱点：在掉电的情况下会失去所保存的数据。

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[AN225301]使用Excelon_LP_SPI_F-RAM低功耗模式进行设计.pdf 1M

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AN225301  
Designing with Excelon™ LP SPI F-RAM™ Low-Power Modes  
Author: Shivendra Singh  
Associated Part Family: CY15x102Qx, CY15x104Qx, CY15x108Qx  
AN225301 provides an overview of the three low-power modes of Cypress Excelon™ Low-Power SPI F-RAMs and their  
use case with examples showing advantages and disadvantages to help when selecting the appropriate low-power mode  
for power-efficient, battery-operated system designs.  
1
Introduction  
The Excelon LP SPI F-RAMs offer three low-power modes which include standby (ISB), deep-power-down (IDPD), and  
hibernate (IHIB). Any of these three-low power modes can be effectively applied in system designs to optimize the  
system power consumption while the system is either in power saving mode or shutdown, thus can help enhancing the  
system battery life.  
̅̅̅̅  
Standby mode is the default low-power mode for the SPI F-RAM when its chip-select (CS) pin is de-asserted to a logic  
̅̅̅̅  
HIGH to terminate an ongoing device operation. If the device is in standby mode, CS transition from HIGH to LOW exits  
the standby mode and the device is immediately available for access. The deep-power-down or hibernate mode entry  
is command (opcode) based; therefore, the SPI F-RAM enters either deep-power-down or hibernate mode only after  
̅̅̅̅  
specific command is issued, followed by CS transitioning to HIGH.  
̅̅̅̅  
The deep-power-down or hibernate mode exits when CS is de-asserted to logic LOW, like when exiting the standby  
mode. However, exiting from deep-power-down or hibernate mode is not immediate and exit delay is associated with  
an internal wake up cycle time. This means that even though the deep-power-down and hibernate modes draw lower  
currents than standby mode, they may not necessarily offer the lowest total energy consumption always because of  
the overheads associated with the low-power mode entry and exit timings.  
This application note guides you through the details of Excelon LP SPI F-RAM low-power modes, analyzes various use  
cases, and highlights associated overheads with each low-power mode based upon the system duty cycle to access  
the SPI F-RAM. Selecting an effective low-power mode of operation of the SPI F-RAM can help reduce the total system  
power in power-sensitive, battery-operated systems.  
2
Low-Power Modes in Excelon LP F-RAMs  
This section describes in detail the three low-power modes supported by Excelon LP SPI F-RAM.  
2.1  
Standby Mode  
Standby mode is the default power saving mode when any noy operation is inhibited. Standby mode is  
̅̅̅̅  
enabled by de-asserting the Chip Select pin (CS) to a logic HIGH. highlights instances when the SPI F-RAM  
enters and exits the standby mode.  
Document No. 002-25301 Rev. **  
1

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