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EtherCAT的ESC芯片资料 LAN9252 手册

更新时间:2019-11-21 13:37:05 大小:2M 上传用户:ljbljb查看TA发布的资源 标签:lan9252EtherCAT 下载积分:1分 评价赚积分 (如何评价?) 打赏 收藏 评论(1) 举报

资料介绍

EtherCAT的ESC芯片资料,用于EtherCAT从站开发。

部分文件列表

文件名 大小
Lan9252.pdf 2M

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LAN9252  
2/3-Port EtherCAT® Slave Controller with  
Integrated Ethernet PHYs  
Highlights  
Key Benefits  
• 2/3-port EtherCAT slave controller with 3 Fieldbus  
Memory Management Units (FMMUs) and  
4 SyncManagers  
• Interfaces to most 8/16-bit embedded controllers  
and 32-bit embedded controllers with an 8/16-bit  
bus  
• Integrated Ethernet PHYs with HP Auto-MDIX  
• Wake on LAN (WoL) support  
• Low power mode allows systems to enter sleep  
mode until addressed by the Master  
• Cable diagnostic support  
• Integrated high-performance 100Mbps Ethernet  
transceivers  
-
-
-
-
-
Compliant with IEEE 802.3/802.3u (Fast Ethernet)  
100BASE-FX support via external fiber transceiver  
Loop-back modes  
Automatic polarity detection and correction  
HP Auto-MDIX  
• EtherCAT slave controller  
-
-
-
Supports 3 FMMUs  
Supports 4 SyncManagers  
Distributed clock support allows synchronization with  
other EtherCAT devices  
• 1.8V to 3.3V variable voltage I/O  
-
4K bytes of DPRAM  
• Integrated 1.2V regulator for single 3.3V operation  
• Low pin count and small body size package  
• 8/16-Bit Host Bus Interface  
-
-
Indexed register or multiplexed bus  
Allows local host to enter sleep mode until addressed by  
EtherCAT Master  
Target Applications  
-
SPI / Quad SPI support  
• Digital I/O Mode for optimized system cost  
• 3rd port for flexible network configurations  
• Comprehensive power management features  
• Motor Motion Control  
• Process/Factory Automation  
• Communication Modules, Interface Cards  
• Sensors  
• Hydraulic & Pneumatic Valve Systems  
• Operator Interfaces  
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-
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3 power-down levels  
Wake on link status change (energy detect)  
Magic packet wakeup, Wake on LAN (WoL), wake on  
broadcast, wake on perfect DA  
-
Wakeup indicator event signal  
• Power and I/O  
-
Integrated power-on reset circuit  
-
Latch-up performance exceeds 150mA  
per EIA/JESD78, Class II  
-
-
JEDEC Class 3A ESD performance  
Single 3.3V power supply  
(integrated 1.2V regulator)  
• Additional Features  
-
Multifunction GPIOs  
-
Ability to use low cost 25MHz crystal for reduced BOM  
• Packaging  
-
Pb-free RoHS compliant 64-pin QFN or 64-pin TQFP-  
EP  
• Available in commercial, industrial, and extended  
industrial* temp. ranges  
*Extended temp. (105ºC) is supported only in the 64-QFN with an  
external voltage regulator (internal regulator must be disabled) and  
2.5V (typ) Ethernet magnetics.  
2015 Microchip Technology Inc.  
DS00001909A-page 1  

全部评论(1)

  • 2022-07-29 17:06:31Esmusein

    不错,学习学习

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