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xinlinx-Spartan6开发板原理图详解

更新时间：2019-12-28 18:08:38 大小：2M 上传用户：xuzhen1查看TA发布的资源 标签：xinlinxspartan-6 下载积分：0分 评价赚积分 （如何评价?） 打赏 收藏 评论(1) 举报

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The information disclosed to you hereunder (the Materials ) is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available

"AS IS"and with all faults, Xilinx hereby DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR ST ATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort. includina nealigence. or under anv other theorv of liabilitv) for any loss or damage of any kind or nature related to, arising under, or in connection with, the Materials (including vour use of the Materials), including for any direct, indirect, special, incidental, or consequential loss or damage (including loss of data, profits, qoodwill, or any type of loss or damage suffered as a result of anv action brought by a third party) 

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SP601 Hardware  
User Guide  
UG518 (v1.7) September 26, 2012  
? Copyright 2009  
– 2012 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included  
herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners.  
DISCLAIMER  
The information disclosed to you hereunder (the  
“Materials ”) is provided solely for the selection and use of Xilinx products. To the maximum  
extent permitted by applicable law: (1) Materials are made available  
WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR ST  
“AS IS ” and with all faults, Xilinx hereby DISCLAIMS ALL  
ATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF  
MERCHANTABILITY , NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether  
in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising  
under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or  
consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action  
brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same.  
Xilinx assumes no obligation to correct any errors contained in the Materials, or to advise you of any corrections or update. Y  
reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are subject to the terms and  
ou may not  
conditions of the Limited Warranties which can be viewed at  
; IP cores may be subject to warranty and  
support terms contained in a license issued to you by Xilinx. Xilinx products are not designed or intended to be fail-safe or for use in any  
application requiring fail-safe performance; you assume sole risk and liability for use of Xilinx products in Critical Applications:  
.
Revision History  
The following table shows the revision history for this document.  
Date  
Version  
1.0  
Revision  
07/15/09  
08/19/09  
Initial Xilinx release.  
1.1  
? Added Appendix B, VITA 57.1 FMC LPC Connector Pinout  
? Updated Figure 1-17.  
.
? Updated Table 1-4, Table 1-19, and Table 1-22.  
? Added introductory paragraph to  
Appendix C, SP601 Master UCF .  
? Miscellaneous typographical edits and new user guide template.  
05/17/10  
06/16/10  
1.2  
1.3  
? Updated Figure 1-1, Figure 1-2, Figure 1-14, Figure 1-18, Table 1-9, Table 1-1,  
Table 1-11, and Table 1-16.  
? Added Figure 1-7, Figure 1-8, and Table 1-13.  
? Updated 9. VITA 57.1 FMC-LPC Connector, page 25, Appendix B, VITA 57.1 FMC  
LPC Connector Pinout , and Appendix C, SP601 Master UCF .  
Reversed order of 15. Configuration Options and 16. Power Management . Updated 1.  
Spartan-6 XC6SLX16-2CSG324 FPGA and 2. 128 MB DDR2 Component Memory . Added  
Table 1-26. Added UG394 ,Spartan-6 FPGA Power Management User Guideto Appendix D,  
References.  
09/24/10  
02/16/11  
1.4  
1.5  
Added Power System Test Points , including Table 1-25.  
Added note and revised header description to indicate the I/Os support LVCMOS25  
signaling on page 34. Revised oscillator manufacturer information from Epson to SiTime  
on page page 23 and page 51.  
07/18/11  
09/26/12  
1.6  
1.7  
Corrected wording from  
Oscillator (Differential), page  
“ PPM frequency jitter  
23. Added Table 1-15, page 27.  
” to “ PPM frequency stability  
” in  
Added Regulatory and Compliance Information, page  
53.  
SP601 Hardware User Guide  
UG518 (v1.7) September 26, 2012  

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