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基于双端口RAM+CPLD的高精度信号发生器的设计

更新时间:2020-07-27 11:34:53 大小:290K 上传用户:xiaohei1810查看TA发布的资源 标签:ramcpld信号发生器 下载积分:5分 评价赚积分 (如何评价?) 打赏 收藏 评论(0) 举报

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为满足SOE分辨率毫秒甚至微秒级的检测要求,设计了一种高精度SOE信号发生器。通过分析常规信号发生器的原理及其误差来源,得出在硬件方面进行改进是提高信号发生器性能较好的方式。充分结合双端口RAM与复杂可编程逻辑器件(CPLD)电路的优点,设计出高精度信号发生器。高精度信号发生器能够将SOE信号的精度提高至亚纳秒级,为电力自动化装置SOE分辨率的准确检测提供重要基础,满足了用户现场测试的需求。

In order to satisfy the millisecond even microsecond level requirement in the SOE resolution test,a high precision SOE signal generator is designed.By analyzing the principle and error sources of ordinary signal generator,the better way to improve the performance of signal generator is concluded which is the modification of hardware.By the full integration of advantages of dual port RAM and complex programmable logic device(CPLD),a high precision signal generator is designed.The high precision signal generator can promote the precision of SOE signal to sub-nanosecond level,which provides important basis for the precise testing of SOE resolution of electric power automation equipment,and satisfies the field testing requirement of users.

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基于双端口RAM+CPLD的高精度信号发生器的设计.pdf 290K

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