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GNSS接收机基带处理电路低功耗设计综述
资料介绍
通过时GNSS接收机基带处理电路低功耗设计技术进行调研和总结,发现大部分技术可归属于两个层次:电路级优化技术和算法级优化技术。电路级优化技术主要包括低功耗的并行相关器的设计、多通道的时分复用、多普勒补偿后的信号下采样、低功耗累加器的使用等技术;算法级优化技术是指接收机的间歇工作方式(在不需要定位输出时,使接收机运行在低功耗模式),主要通过接收机的高级电源管理系统、快速首次定位、重新捕获定位等技术实现。本文对这些方法进行了总结和对比,给出了两个层次优化技术的优缺点。
By researching the low-power design techniques of GNSS receiver baseband processing circuit, we included that most of the techniques can be attributed to two levels: circuit-level optimization techniques and algorithm-level optimization techniques. Circuit-level optimization techniques involved low-power parallel correlator design, multi-channel time-division multiplexing, down resampling of the signal after Doppler compensation, low-power accumulator; algorithm-level optimization techniques refer to working intermittent. The receiver works in the low-power mode when position output is not required. The work style can be implemented through the receiver's advanced power management system, short time of fir...
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文件名 | 大小 |
GNSS接收机基带处理电路低功耗设计综述.pdf | 515K |
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