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一种低功耗异步FIFO在ASIC中的设计

更新时间:2020-05-14 20:20:38 大小:367K 上传用户:守着阳光1985查看TA发布的资源 标签:FIFOasic 下载积分:3分 评价赚积分 (如何评价?) 打赏 收藏 评论(0) 举报

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为解决PCI视频采集卡中跨时钟域数据准确传输的问题,提出一种低功耗的异步先进先出(First In FirstOut,FIFO)存储器模块的实现方案。为适应大量的视频数据猝发传输设计一种宽为36位、深为256的异步FIFO,基于低功耗设计思想,使用格雷码地址编码以有效抑制亚稳态,增加了门控时钟电路。该模块已经过测试验证,并与音视频模块和PCI桥集成后流片,可以工作在最大197MHz的频率下,完全符合设计要求。该桥芯片可以支持4路D1画质(704×576分辨率)实时音视频数据稳定采集。

Facing the data accurate transmission problem of cross clock domain in the video capture card through PCI interface, we proposed a low-power consumption asynchronous FIFO memory module, which has a width of 36bits and a depth of 256 to carter the large amount video data demand of burst transfer. Complying with the low-power consumption design strategy, we encoded the address pointer using Gray code to inhibit the metastable state effectively,and a clock gating circuit was added into our design. The module has been tested and verified, and can maximally work at 197 MHz frequency after integrated with PCI bridge audio & video module and taped out. This multimedia bridge ASIC can support up to 4 cha...

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一种低功耗异步FIFO在ASIC中的设计.pdf 367K

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