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DSP TMS320x2806x 数据手册

更新时间：2019-12-13 20:22:20 大小：9M 上传用户：xjtburden查看TA发布的资源 标签：f28069DSP 下载积分：0分 评价赚积分 （如何评价?） 打赏 收藏 评论(1) 举报

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DSP TMS320x2806x 数据手册 有详细的说明介绍和指南

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TMS320x2806x  
Technical Reference Manual  
Literature Number: SPRUH18H  
January 2011–Revised November 2019  
Contents  
Preface.......................................................................................................................................
1
System Control and Interrupts .............................................................................................
1.2  
Flash and OTP Memory Blocks ..........................................................................................
1.2.1 Flash Memory......................................................................................................
1.2.2 OTP Memory.......................................................................................................
1.2.3 Flash and OTP Power Modes ...................................................................................
1.2.4 Flash and OTP Registers ........................................................................................
Code Security Module (CSM).............................................................................................
1.3.1 Functional Description ............................................................................................
1.3.2 CSM Impact on Other On-Chip Resources ....................................................................
1.3.3 Incorporating Code Security in User Applications ............................................................
1.3.4 Do's and Don'ts to Protect Security Logic......................................................................
1.3.5 CSM Features - Summary .......................................................................................
Clocking .....................................................................................................................
1.4.1 Clocking and System Control....................................................................................
1.4.2 OSC and PLL Block...............................................................................................
1.4.3 Low-Power Modes Block .........................................................................................
1.4.4 CPU Watchdog Block ...........................................................................................
1.4.5 32-Bit CPU Timers 0/1/2........................................................................................
General-Purpose Input/Output (GPIO).................................................................................
1.5.1 GPIO Module Overview.........................................................................................
1.5.2 Configuration Overview .........................................................................................
1.5.3 Digital General Purpose I/O Control...........................................................................
1.5.4 Input Qualification................................................................................................
1.5.5 GPIO and Peripheral Multiplexing (MUX) ....................................................................
1.5.6 Register Bit Definitions..........................................................................................
Peripheral Frames ........................................................................................................
1.6.1 Peripheral Frame Registers ....................................................................................
1.6.2 EALLOW-Protected Registers .................................................................................
1.6.3 Device Emulation Registers ....................................................................................
1.6.4 Write-Followed-by-Read Protection ...........................................................................
Peripheral Interrupt Expansion (PIE)...................................................................................
1.7.1 Overview of the PIE Controller.................................................................................
1.7.2 Vector Table Mapping...........................................................................................
1.7.3 Interrupt Sources.................................................................................................
1.7.4 PIE Configuration Registers....................................................................................
1.7.5 PIE Interrupt Registers..........................................................................................
1.7.6 External Interrupt Control Registers ..........................................................................
VREG/BOR/POR .........................................................................................................
1.8.1 On-chip Voltage Regulator (VREG) ...........................................................................
1.8.2 On-chip Power-On Reset (POR) and Brown-Out Reset (BOR) Circuit...................................
1.3  
1.4  
1.5  
1.6  
1.7  
1.8  
2
Boot ROM ........................................................................................................................
2.1  
Boot ROM Memory Map .................................................................................................
2.1.1 On-Chip Boot ROM Math Tables ..............................................................................
2.1.2 On-Chip Boot ROM IQmath Functions........................................................................
2
Contents  
SPRUH18H–January 2011–Revised November 2019  
Copyright © 2011–2019, Texas Instruments Incorporated  

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