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Spartan-6 FPGA用mig生成DDR2接口的IP核.zip
资料介绍
Spartan-6 FPGA用mig生成DDR2接口的IP核.zip
部分文件列表
| 文件名 | 大小 |
| mig_v3_5/example_design/par/example_top.bit | |
| mig_v3_5/example_design/par/example_top.cdc | |
| mig_v3_5/example_design/par/example_top.ucf | |
| mig_v3_5/example_design/rtl/example_top.v | |
| mig_v3_5/example_design/rtl/mcb_raw_wrapper.v | |
| mig_v3_5/example_design/rtl/memc3_tb_top.v | |
| readme.txt | 3KB |
| ready_for_download/example_top.bit | |
| ready_for_download/make_download_files.bat | |
| ready_for_download/sp601_12.2.cpj | |
| sp601_mig_prebuilt_example_design/mig_v3_5.gise | 1KB |
| ... | |
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