VHLD

--串口通信电路 library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity sci is port(clksci: in std_logic; rxd: in std_logic; rst: in std_logic; rxdfout: out std_logic; txd: out std_logic; lpt: out std_logic_vector(7 downto 0)); end sci; architecture rtl of sci is signal scir: std_logic_vector(7 downto 0); signal sh_r: std_logic_vector(3 downto 0); signal sl_r: std_logic_vector(3 downto 0); signal scit: std_logic_vector(7 downto 0); signal sh_t: std_logic_vector(3 downto 0); signal sl_t: std_logic_vector(3 downto 0); signal d_fb: std_logic_vector(7 downto 0); signal dfbb: std_logic_vector(7 downto 0); signal dfrxd: std_logic_vector(2 downto 0); signal rxdb: std_logic; signal rxdf: std_logic; signal txdf: std_logic; signal txdcn: std_logic; begin sh_r<=scir(7 downto 4); sl_r<=scir(3 downto 0); sh_t<=scit(7 downto 4); sl_t<=scit(3 downto 0); rxdfout<=rxdf; txdcn<=txdf or rxdf; --串口接收计数器 process(clksci,rst) begin if(rst='1') then scir<="00000000"; elsif(clksci'event and clksci='1') then if((scir<="01101111") and (rxd='0')) then scir<="01110000"; elsif((scir<="01101111") and (rxd='1')) then scir<="00000000"; else scir<=scir+'1'; end if; end if; end process; --串口接收值去除干扰 process(clksci,rst,rxd,sl_r) begin if(rst='1') then dfrxd<="000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111")) then case sl_r is when "0111"=>dfrxd(0)<=rxd; when "1000"=>dfrxd(1)<=rxd; when "1001"=>dfrxd(2)<=rxd; when others=>NULL; end case; end if; end if; end process; --串口接收值确认 process(clksci,dfrxd) begin if(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1011")) then case dfrxd is when "000"=>rxdb<='0'; when "001"=>rxdb<='0'; when "010"=>rxdb<='0'; when "100"=>rxdb<='0'; when "111"=>rxdb<='1'; when "110"=>rxdb<='1'; when "101"=>rxdb<='1'; when "011"=>rxdb<='1'; when others=>NULL; end case; end if; end if; end process; --串并转换 process(clksci,rst) begin if(rst='1') then d_fb<="00000000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1101")) then d_fb(7)<=rxdb; for i in 0 to 6 loop d_fb(i)<=d_fb(i+1); end loop; end if; end if; end process; --串并转换结束 并行输出锁存器 process(clksci,d_fb) begin if(clksci'event and clksci='1') then if((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then if(d_fb>"01001101") then lpt<="00000000"; else lpt<=d_fb; end if; end if; end if; end process; --串口通信指示 串行输出定时器控制 process(clksci) begin if(clksci'event and clksci='1') then if(rxd='0')then rxdf<='1'; elsif((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then rxdf<='0'; end if; end if; end process; --串口发送锁存器(缓存器) process(rxdf,d_fb) begin if(rxdf'event and rxdf='0') then if(d_fb<"01001110") then dfbb<=d_fb; else dfbb<="11111111"; end if; end if; end process; --串行输出定时器 process(clksci,rxdf) variable time: integer range 0 to 15; begin if(rxdf='1') then time:=0; txdf<='1'; elsif(clksci'event and clksci='1') then if(time=15) then txdf<='1'; else time:=time+1; txdf<='0'; end if; end if; end process; --串行发送计数器 process(clksci,rst,txdcn) begin if((rst='1') or (dfbb="00000000")) then scit<="00000000"; elsif(clksci'event and clksci='1') then if((scit<="01101111") and (txdcn='0')) then scit<="01110000"; elsif((scit<="01101111") and (txdcn='1')) then scit<="00000000"; else scit<=scit+'1'; end if; end if; end process; --并串转换 process(clksci,sh_t) begin if(clksci'event and clksci='1') then case sh_t is when "0111"=>txd<='0'; when "1000"=>txd<=dfbb(0); when "1001"=>txd<=dfbb(1); when "1010"=>txd<=dfbb(2); when "1011"=>txd<=dfbb(3); when "1100"=>txd<=dfbb(4); when "1101"=>txd<=dfbb(5); when "1110"=>txd<=dfbb(6); when "1111"=>txd<=dfbb(7); when others=>txd<='1'; end case; end if; end process; end rtl; --串口通信电路 library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity sci is port(clksci: in std_logic; rxd: in std_logic; rst: in std_logic; rxdfout: out std_logic; txd: out std_logic; lpt: out std_logic_vector(7 downto 0)); end sci; architecture rtl of sci is signal scir: std_logic_vector(7 downto 0); signal sh_r: std_logic_vector(3 downto 0); signal sl_r: std_logic_vector(3 downto 0); signal scit: std_logic_vector(7 downto 0); signal sh_t: std_logic_vector(3 downto 0); signal sl_t: std_logic_vector(3 downto 0); signal d_fb: std_logic_vector(7 downto 0); signal dfbb: std_logic_vector(7 downto 0); signal dfrxd: std_logic_vector(2 downto 0); signal rxdb: std_logic; signal rxdf: std_logic; signal txdf: std_logic; signal txdcn: std_logic; begin sh_r<=scir(7 downto 4); sl_r<=scir(3 downto 0); sh_t<=scit(7 downto 4); sl_t<=scit(3 downto 0); rxdfout<=rxdf; txdcn<=txdf or rxdf; --串口接收计数器 process(clksci,rst) begin if(rst='1') then scir<="00000000"; elsif(clksci'event and clksci='1') then if((scir<="01101111") and (rxd='0')) then scir<="01110000"; elsif((scir<="01101111") and (rxd='1')) then scir<="00000000"; else scir<=scir+'1'; end if; end if; end process; --串口接收值去除干扰 process(clksci,rst,rxd,sl_r) begin if(rst='1') then dfrxd<="000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111")) then case sl_r is when "0111"=>dfrxd(0)<=rxd; when "1000"=>dfrxd(1)<=rxd; when "1001"=>dfrxd(2)<=rxd; when others=>NULL; end case; end if; end if; end process; --串口接收值确认 process(clksci,dfrxd) begin if(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1011")) then case dfrxd is when "000"=>rxdb<='0'; when "001"=>rxdb<='0'; when "010"=>rxdb<='0'; when "100"=>rxdb<='0'; when "111"=>rxdb<='1'; when "110"=>rxdb<='1'; when "101"=>rxdb<='1'; when "011"=>rxdb<='1'; when others=>NULL; end case; end if; end if; end process; --串并转换 process(clksci,rst) begin if(rst='1') then d_fb<="00000000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1101")) then d_fb(7)<=rxdb; for i in 0 to 6 loop d_fb(i)<=d_fb(i+1); end loop; end if; end if; end process; --串并转换结束 并行输出锁存器 process(clksci,d_fb) begin if(clksci'event and clksci='1') then if((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then if(d_fb>"01001101") then lpt<="00000000"; else lpt<=d_fb; end if; end if; end if; end process; --串口通信指示 串行输出定时器控制 process(clksci) begin if(clksci'event and clksci='1') then if(rxd='0')then rxdf<='1'; elsif((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then rxdf<='0'; end if; end if; end process; --串口发送锁存器(缓存器) process(rxdf,d_fb) begin if(rxdf'event and rxdf='0') then if(d_fb<"01001110") then dfbb<=d_fb; else dfbb<="11111111"; end if; end if; end process; --串行输出定时器 process(clksci,rxdf) variable time: integer range 0 to 15; begin if(rxdf='1') then time:=0; txdf<='1'; elsif(clksci'event and clksci='1') then if(time=15) then txdf<='1'; else time:=time+1; txdf<='0'; end if; end if; end process; --串行发送计数器 process(clksci,rst,txdcn) begin if((rst='1') or (dfbb="00000000")) then scit<="00000000"; elsif(clksci'event and clksci='1') then if((scit<="01101111") and (txdcn='0')) then scit<="01110000"; elsif((scit<="01101111") and (txdcn='1')) then scit<="00000000"; else scit<=scit+'1'; end if; end if; end process; --并串转换 process(clksci,sh_t) begin if(clksci'event and clksci='1') then case sh_t is when "0111"=>txd<='0'; when "1000"=>txd<=dfbb(0); when "1001"=>txd<=dfbb(1); when "1010"=>txd<=dfbb(2); when "1011"=>txd<=dfbb(3); when "1100"=>txd<=dfbb(4); when "1101"=>txd<=dfbb(5); when "1110"=>txd<=dfbb(6); when "1111"=>txd<=dfbb(7); when others=>txd<='1'; end case; end if; end process; end rtl; --串口通信电路 library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity sci is port(clksci: in std_logic; rxd: in std_logic; rst: in std_logic; rxdfout: out std_logic; txd: out std_logic; lpt: out std_logic_vector(7 downto 0)); end sci; architecture rtl of sci is signal scir: std_logic_vector(7 downto 0); signal sh_r: std_logic_vector(3 downto 0); signal sl_r: std_logic_vector(3 downto 0); signal scit: std_logic_vector(7 downto 0); signal sh_t: std_logic_vector(3 downto 0); signal sl_t: std_logic_vector(3 downto 0); signal d_fb: std_logic_vector(7 downto 0); signal dfbb: std_logic_vector(7 downto 0); signal dfrxd: std_logic_vector(2 downto 0); signal rxdb: std_logic; signal rxdf: std_logic; signal txdf: std_logic; signal txdcn: std_logic; begin sh_r<=scir(7 downto 4); sl_r<=scir(3 downto 0); sh_t<=scit(7 downto 4); sl_t<=scit(3 downto 0); rxdfout<=rxdf; txdcn<=txdf or rxdf; --串口接收计数器 process(clksci,rst) begin if(rst='1') then scir<="00000000"; elsif(clksci'event and clksci='1') then if((scir<="01101111") and (rxd='0')) then scir<="01110000"; elsif((scir<="01101111") and (rxd='1')) then scir<="00000000"; else scir<=scir+'1'; end if; end if; end process; --串口接收值去除干扰 process(clksci,rst,rxd,sl_r) begin if(rst='1') then dfrxd<="000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111")) then case sl_r is when "0111"=>dfrxd(0)<=rxd; when "1000"=>dfrxd(1)<=rxd; when "1001"=>dfrxd(2)<=rxd; when others=>NULL; end case; end if; end if; end process; --串口接收值确认 process(clksci,dfrxd) begin if(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1011")) then case dfrxd is when "000"=>rxdb<='0'; when "001"=>rxdb<='0'; when "010"=>rxdb<='0'; when "100"=>rxdb<='0'; when "111"=>rxdb<='1'; when "110"=>rxdb<='1'; when "101"=>rxdb<='1'; when "011"=>rxdb<='1'; when others=>NULL; end case; end if; end if; end process; --串并转换 process(clksci,rst) begin if(rst='1') then d_fb<="00000000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1101")) then d_fb(7)<=rxdb; for i in 0 to 6 loop d_fb(i)<=d_fb(i+1); end loop; end if; end if; end process; --串并转换结束 并行输出锁存器 process(clksci,d_fb) begin if(clksci'event and clksci='1') then if((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then if(d_fb>"01001101") then lpt<="00000000"; else lpt<=d_fb; end if; end if; end if; end process; --串口通信指示 串行输出定时器控制 process(clksci) begin if(clksci'event and clksci='1') then if(rxd='0')then rxdf<='1'; elsif((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then rxdf<='0'; end if; end if; end process; --串口发送锁存器(缓存器) process(rxdf,d_fb) begin if(rxdf'event and rxdf='0') then if(d_fb<"01001110") then dfbb<=d_fb; else dfbb<="11111111"; end if; end if; end process; --串行输出定时器 process(clksci,rxdf) variable time: integer range 0 to 15; begin if(rxdf='1') then time:=0; txdf<='1'; elsif(clksci'event and clksci='1') then if(time=15) then txdf<='1'; else time:=time+1; txdf<='0'; end if; end if; end process; --串行发送计数器 process(clksci,rst,txdcn) begin if((rst='1') or (dfbb="00000000")) then scit<="00000000"; elsif(clksci'event and clksci='1') then if((scit<="01101111") and (txdcn='0')) then scit<="01110000"; elsif((scit<="01101111") and (txdcn='1')) then scit<="00000000"; else scit<=scit+'1'; end if; end if; end process; --并串转换 process(clksci,sh_t) begin if(clksci'event and clksci='1') then case sh_t is when "0111"=>txd<='0'; when "1000"=>txd<=dfbb(0); when "1001"=>txd<=dfbb(1); when "1010"=>txd<=dfbb(2); when "1011"=>txd<=dfbb(3); when "1100"=>txd<=dfbb(4); when "1101"=>txd<=dfbb(5); when "1110"=>txd<=dfbb(6); when "1111"=>txd<=dfbb(7); when others=>txd<='1'; end case; end if; end process; end rtl; --串口通信电路 library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity sci is port(clksci: in std_logic; rxd: in std_logic; rst: in std_logic; rxdfout: out std_logic; txd: out std_logic; lpt: out std_logic_vector(7 downto 0)); end sci; architecture rtl of sci is signal scir: std_logic_vector(7 downto 0); signal sh_r: std_logic_vector(3 downto 0); signal sl_r: std_logic_vector(3 downto 0); signal scit: std_logic_vector(7 downto 0); signal sh_t: std_logic_vector(3 downto 0); signal sl_t: std_logic_vector(3 downto 0); signal d_fb: std_logic_vector(7 downto 0); signal dfbb: std_logic_vector(7 downto 0); signal dfrxd: std_logic_vector(2 downto 0); signal rxdb: std_logic; signal rxdf: std_logic; signal txdf: std_logic; signal txdcn: std_logic; begin sh_r<=scir(7 downto 4); sl_r<=scir(3 downto 0); sh_t<=scit(7 downto 4); sl_t<=scit(3 downto 0); rxdfout<=rxdf; txdcn<=txdf or rxdf; --串口接收计数器 process(clksci,rst) begin if(rst='1') then scir<="00000000"; elsif(clksci'event and clksci='1') then if((scir<="01101111") and (rxd='0')) then scir<="01110000"; elsif((scir<="01101111") and (rxd='1')) then scir<="00000000"; else scir<=scir+'1'; end if; end if; end process; --串口接收值去除干扰 process(clksci,rst,rxd,sl_r) begin if(rst='1') then dfrxd<="000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111")) then case sl_r is when "0111"=>dfrxd(0)<=rxd; when "1000"=>dfrxd(1)<=rxd; when "1001"=>dfrxd(2)<=rxd; when others=>NULL; end case; end if; end if; end process; --串口接收值确认 process(clksci,dfrxd) begin if(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1011")) then case dfrxd is when "000"=>rxdb<='0'; when "001"=>rxdb<='0'; when "010"=>rxdb<='0'; when "100"=>rxdb<='0'; when "111"=>rxdb<='1'; when "110"=>rxdb<='1'; when "101"=>rxdb<='1'; when "011"=>rxdb<='1'; when others=>NULL; end case; end if; end if; end process; --串并转换 process(clksci,rst) begin if(rst='1') then d_fb<="00000000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1101")) then d_fb(7)<=rxdb; for i in 0 to 6 loop d_fb(i)<=d_fb(i+1); end loop; end if; end if; end process; --串并转换结束 并行输出锁存器 process(clksci,d_fb) begin if(clksci'event and clksci='1') then if((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then if(d_fb>"01001101") then lpt<="00000000"; else lpt<=d_fb; end if; end if; end if; end process; --串口通信指示 串行输出定时器控制 process(clksci) begin if(clksci'event and clksci='1') then if(rxd='0')then rxdf<='1'; elsif((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then rxdf<='0'; end if; end if; end process; --串口发送锁存器(缓存器) process(rxdf,d_fb) begin if(rxdf'event and rxdf='0') then if(d_fb<"01001110") then dfbb<=d_fb; else dfbb<="11111111"; end if; end if; end process; --串行输出定时器 process(clksci,rxdf) variable time: integer range 0 to 15; begin if(rxdf='1') then time:=0; txdf<='1'; elsif(clksci'event and clksci='1') then if(time=15) then txdf<='1'; else time:=time+1; txdf<='0'; end if; end if; end process; --串行发送计数器 process(clksci,rst,txdcn) begin if((rst='1') or (dfbb="00000000")) then scit<="00000000"; elsif(clksci'event and clksci='1') then if((scit<="01101111") and (txdcn='0')) then scit<="01110000"; elsif((scit<="01101111") and (txdcn='1')) then scit<="00000000"; else scit<=scit+'1'; end if; end if; end process; --并串转换 process(clksci,sh_t) begin if(clksci'event and clksci='1') then case sh_t is when "0111"=>txd<='0'; when "1000"=>txd<=dfbb(0); when "1001"=>txd<=dfbb(1); when "1010"=>txd<=dfbb(2); when "1011"=>txd<=dfbb(3); when "1100"=>txd<=dfbb(4); when "1101"=>txd<=dfbb(5); when "1110"=>txd<=dfbb(6); when "1111"=>txd<=dfbb(7); when others=>txd<='1'; end case; end if; end process; end rtl; --串口通信电路 library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity sci is port(clksci: in std_logic; rxd: in std_logic; rst: in std_logic; rxdfout: out std_logic; txd: out std_logic; lpt: out std_logic_vector(7 downto 0)); end sci; architecture rtl of sci is signal scir: std_logic_vector(7 downto 0); signal sh_r: std_logic_vector(3 downto 0); signal sl_r: std_logic_vector(3 downto 0); signal scit: std_logic_vector(7 downto 0); signal sh_t: std_logic_vector(3 downto 0); signal sl_t: std_logic_vector(3 downto 0); signal d_fb: std_logic_vector(7 downto 0); signal dfbb: std_logic_vector(7 downto 0); signal dfrxd: std_logic_vector(2 downto 0); signal rxdb: std_logic; signal rxdf: std_logic; signal txdf: std_logic; signal txdcn: std_logic; begin sh_r<=scir(7 downto 4); sl_r<=scir(3 downto 0); sh_t<=scit(7 downto 4); sl_t<=scit(3 downto 0); rxdfout<=rxdf; txdcn<=txdf or rxdf; --串口接收计数器 process(clksci,rst) begin if(rst='1') then scir<="00000000"; elsif(clksci'event and clksci='1') then if((scir<="01101111") and (rxd='0')) then scir<="01110000"; elsif((scir<="01101111") and (rxd='1')) then scir<="00000000"; else scir<=scir+'1'; end if; end if; end process; --串口接收值去除干扰 process(clksci,rst,rxd,sl_r) begin if(rst='1') then dfrxd<="000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111")) then case sl_r is when "0111"=>dfrxd(0)<=rxd; when "1000"=>dfrxd(1)<=rxd; when "1001"=>dfrxd(2)<=rxd; when others=>NULL; end case; end if; end if; end process; --串口接收值确认 process(clksci,dfrxd) begin if(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1011")) then case dfrxd is when "000"=>rxdb<='0'; when "001"=>rxdb<='0'; when "010"=>rxdb<='0'; when "100"=>rxdb<='0'; when "111"=>rxdb<='1'; when "110"=>rxdb<='1'; when "101"=>rxdb<='1'; when "011"=>rxdb<='1'; when others=>NULL; end case; end if; end if; end process; --串并转换 process(clksci,rst) begin if(rst='1') then d_fb<="00000000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1101")) then d_fb(7)<=rxdb; for i in 0 to 6 loop d_fb(i)<=d_fb(i+1); end loop; end if; end if; end process; --串并转换结束 并行输出锁存器 process(clksci,d_fb) begin if(clksci'event and clksci='1') then if((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then if(d_fb>"01001101") then lpt<="00000000"; else lpt<=d_fb; end if; end if; end if; end process; --串口通信指示 串行输出定时器控制 process(clksci) begin if(clksci'event and clksci='1') then if(rxd='0')then rxdf<='1'; elsif((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then rxdf<='0'; end if; end if; end process; --串口发送锁存器(缓存器) process(rxdf,d_fb) begin if(rxdf'event and rxdf='0') then if(d_fb<"01001110") then dfbb<=d_fb; else dfbb<="11111111"; end if; end if; end process; --串行输出定时器 process(clksci,rxdf) variable time: integer range 0 to 15; begin if(rxdf='1') then time:=0; txdf<='1'; elsif(clksci'event and clksci='1') then if(time=15) then txdf<='1'; else time:=time+1; txdf<='0'; end if; end if; end process; --串行发送计数器 process(clksci,rst,txdcn) begin if((rst='1') or (dfbb="00000000")) then scit<="00000000"; elsif(clksci'event and clksci='1') then if((scit<="01101111") and (txdcn='0')) then scit<="01110000"; elsif((scit<="01101111") and (txdcn='1')) then scit<="00000000"; else scit<=scit+'1'; end if; end if; end process; --并串转换 process(clksci,sh_t) begin if(clksci'event and clksci='1') then case sh_t is when "0111"=>txd<='0'; when "1000"=>txd<=dfbb(0); when "1001"=>txd<=dfbb(1); when "1010"=>txd<=dfbb(2); when "1011"=>txd<=dfbb(3); when "1100"=>txd<=dfbb(4); when "1101"=>txd<=dfbb(5); when "1110"=>txd<=dfbb(6); when "1111"=>txd<=dfbb(7); when others=>txd<='1'; end case; end if; end process; end rtl; --串口通信电路 library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity sci is port(clksci: in std_logic; rxd: in std_logic; rst: in std_logic; rxdfout: out std_logic; txd: out std_logic; lpt: out std_logic_vector(7 downto 0)); end sci; architecture rtl of sci is signal scir: std_logic_vector(7 downto 0); signal sh_r: std_logic_vector(3 downto 0); signal sl_r: std_logic_vector(3 downto 0); signal scit: std_logic_vector(7 downto 0); signal sh_t: std_logic_vector(3 downto 0); signal sl_t: std_logic_vector(3 downto 0); signal d_fb: std_logic_vector(7 downto 0); signal dfbb: std_logic_vector(7 downto 0); signal dfrxd: std_logic_vector(2 downto 0); signal rxdb: std_logic; signal rxdf: std_logic; signal txdf: std_logic; signal txdcn: std_logic; begin sh_r<=scir(7 downto 4); sl_r<=scir(3 downto 0); sh_t<=scit(7 downto 4); sl_t<=scit(3 downto 0); rxdfout<=rxdf; txdcn<=txdf or rxdf; --串口接收计数器 process(clksci,rst) begin if(rst='1') then scir<="00000000"; elsif(clksci'event and clksci='1') then if((scir<="01101111") and (rxd='0')) then scir<="01110000"; elsif((scir<="01101111") and (rxd='1')) then scir<="00000000"; else scir<=scir+'1'; end if; end if; end process; --串口接收值去除干扰 process(clksci,rst,rxd,sl_r) begin if(rst='1') then dfrxd<="000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111")) then case sl_r is when "0111"=>dfrxd(0)<=rxd; when "1000"=>dfrxd(1)<=rxd; when "1001"=>dfrxd(2)<=rxd; when others=>NULL; end case; end if; end if; end process; --串口接收值确认 process(clksci,dfrxd) begin if(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1011")) then case dfrxd is when "000"=>rxdb<='0'; when "001"=>rxdb<='0'; when "010"=>rxdb<='0'; when "100"=>rxdb<='0'; when "111"=>rxdb<='1'; when "110"=>rxdb<='1'; when "101"=>rxdb<='1'; when "011"=>rxdb<='1'; when others=>NULL; end case; end if; end if; end process; --串并转换 process(clksci,rst) begin if(rst='1') then d_fb<="00000000"; elsif(clksci'event and clksci='1') then if((sh_r>="1000") and (sh_r<="1111") and (sl_r="1101")) then d_fb(7)<=rxdb; for i in 0 to 6 loop d_fb(i)<=d_fb(i+1); end loop; end if; end if; end process; --串并转换结束 并行输出锁存器 process(clksci,d_fb) begin if(clksci'event and clksci='1') then if((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then if(d_fb>"01001101") then lpt<="00000000"; else lpt<=d_fb; end if; end if; end if; end process; --串口通信指示 串行输出定时器控制 process(clksci) begin if(clksci'event and clksci='1') then if(rxd='0')then rxdf<='1'; elsif((rxdf='1') and (sh_r="1111") and (sl_r="1111")) then rxdf<='0'; end if; end if; end process; --串口发送锁存器(缓存器) process(rxdf,d_fb) begin if(rxdf'event and rxdf='0') then if(d_fb<"01001110") then dfbb<=d_fb; else dfbb<="11111111"; end if; end if; end process; --串行输出定时器 process(clksci,rxdf) variable time: integer range 0 to 15; begin if(rxdf='1') then time:=0; txdf<='1'; elsif(clksci'event and clksci='1') then if(time=15) then txdf<='1'; else time:=time+1; txdf<='0'; end if; end if; end process; --串行发送计数器 process(clksci,rst,txdcn) begin if((rst='1') or (dfbb="00000000")) then scit<="00000000"; elsif(clksci'event and clksci='1') then if((scit<="01101111") and (txdcn='0')) then scit<="01110000"; elsif((scit<="01101111") and (txdcn='1')) then scit<="00000000"; else scit<=scit+'1'; end if; end if; end process; --并串转换 process(clksci,sh_t) begin if(clksci'event and clksci='1') then case sh_t is when "0111"=>txd<='0'; when "1000"=>txd<=dfbb(0); when "1001"=>txd<=dfbb(1); when "1010"=>txd<=dfbb(2); when "1011"=>txd<=dfbb(3); when "1100"=>txd<=dfbb(4); when "1101"=>txd<=dfbb(5); when "1110"=>txd<=dfbb(6); when "1111"=>txd<=dfbb(7); when others=>txd<='1'; end case; end if; end process;