推荐星级：
- 1
- 2
- 3
- 4
- 5
Cyclone III开发板的VerilogHDL多功能数字钟程序
资料介绍
Cyclone III开发板的VerilogHDL多功能数字钟程序
部分文件列表
| 文件名 | 文件大小 | 修改时间 |
| clockend/clock.asm.rpt | 7KB | 2013-06-03 11:13:16 |
| clockend/clock.done | 1KB | 2013-06-03 11:13:22 |
| clockend/clock.dpf | 1KB | 2013-06-16 00:13:54 |
| clockend/clock.fit.rpt | 256KB | 2013-06-03 11:13:12 |
| clockend/clock.fit.smsg | 1KB | 2013-06-03 11:13:12 |
| clockend/clock.fit.summary | 1KB | 2013-06-03 11:13:12 |
| clockend/clock.flow.rpt | 8KB | 2013-06-03 11:13:20 |
| clockend/clock.map.rpt | 33KB | 2013-06-03 11:13:02 |
| clockend/clock.map.smsg | 1KB | 2013-06-03 11:13:02 |
| clockend/clock.map.summary | 1KB | 2013-06-03 11:13:02 |
| clockend/clock.pin | 58KB | 2013-06-03 11:13:12 |
| ... | ||
全部评论(0)