基于USB3.0的高速数据传输电路的设计

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针对大容量数据记录器与外围计算机之间的数据通信时间长速度慢的问题,借助USB3.0接口良好的向后兼容性、易于使用性、可热插拔性、传输速度快等特点,设计了以FPGA为主控单元,DDR2 SDRAM作为高速大容量缓存,USB3.0接口作为与计算机进行数据通信接口的高速数据传输电路系统;采用外接I2C接口的EEPROM作为USB3.0接口芯片的启动方式;通过专用的线性稳压器为DDR2提供稳定的参考电压和吸收电流;最后详细介绍了USB3.0接口芯片的固件程序配置和FPGA控制模块的逻辑设计;实验测试结果表明,通过USB3.0接口该系统数据传输速度达到149.29M/s,且数据传输可靠.

According to the problem of the data communication at a reduced rate between the large capacity data recorder and computer peripheral,with the help of USB3.0 interface good backward compatibility,easy of use,hot pluggable resistance,faster transmission speed,design the high-speed data transmission circuitry which is the FPGA as the control unit,DDR2 SDRAM as a high-speed large-capacity cache,USB3.0 interface as a data communication interface with a computer.using the external I2C interface EEPROM as boot mode of USB3.0 interface chip; through linear regulator for DDR2 provides a stable reference voltage and absorption current; introducing firmware c...