积分商城

最新搜索： TI大学计划 电机噪声 AI AD16仿真 逆变器资料 devioctl.h
您现在的位置是：首页 > 技术资料 > SiC BJT的新型高速低损驱动电路设计
推荐星级：
  • 1
  • 2
  • 3
  • 4
  • 5

SiC BJT的新型高速低损驱动电路设计

更新时间：2020-10-25 20:33:20 大小：890K 上传用户：zhengdai查看TA发布的资源 标签：驱动电路 下载积分：1分 评价赚积分 （如何评价?） 打赏 收藏 评论(0) 举报

资料介绍

SiC BJT新型器件是IGBT器件的有力竞争对手,由于SiC BJT是电流型器件,设计适应于SiC BJT的电流型驱动电路非常重要。针对传统双电源阻容RC(resistance-capacitance)驱动电路的不足,设计了一种双电源阻性时序驱动电路。该驱动电路由开通支路、稳态支路和关断支路3个支路组成,通过延时电路产生不同的驱动信号,分别控制3个驱动支路。该结构可以解决传统RC驱动电路的占空比问题和驱动振荡问题,和传统RC驱动电路相比较,其驱动损耗减小很多。为了验证新驱动电路的优势,对两种驱动电路分别进行LTSPICE仿真,并制作了对应的驱动样板,仿真和实验结果验证了所提出方案的良好驱动性能。

The novel SiC BJT is a powerful competitor for IGBT devices. Since the SiC BJT is a current-mode device, the design of a current-mode driver suitable for SiC BJT is very important. To overcome the disadvantages of the traditional dual-source resistance-capacitance(RC) base driver, a dual-source resistance and time-sequence base driver was designed in this paper, which was composed of three branches, i.e., turn-on branch, steady driving branch, and turn-off branch. These branches can be controlled by different driving signals generated by a delay circuit, respectively. The proposed driver can solve problems such as the duty circuit limit and driver oscillations with the traditional RC driver;comparatively, its power loss was also reduced obviously. To validate the advantages of the novel driver, two drivers were simulated by LTSPICE, respectively, and the corresponding prototypes were fabricated. Simulation and experimental results verified the satisfying driving performance of the proposed scheme.

部分文件列表

文件名 大小
SiC_BJT的新型高速低损驱动电路设计.pdf 890K

【关注公众号立即送20积分】

相关下载

全部评论(0)

暂无评论
评论赚积分>>

上传资源 上传优质资源有赏金

热门标签

更多>>

最新上传

  • 打赏
  • 30日榜单

热门下载

推荐下载

本站上的所有资源均为源于网上收集或者由用户自行上传，仅供学习和研究使用，无任何商业目的，版权归原作如有侵权，请 来信指出，本站将立即改正。

ICP许可证号：京ICP证070360号     21IC电子网 2000- 版权所有

京ICP备11013301号

京公网安备 11010802024343号