数字逻辑电路GPIO电磁抗扰度的热应力效应分析

针对集成电路(integrate circuit,IC)在复杂环境中的电磁抗扰度漂移问题,研究了环境热应力对典型数字逻辑集成电路通用输入/输出(general purpose input output,GPIO)端口电磁抗扰度的影响.分析典型FPGA GPIO电气拓扑结构及电磁-热耦合应力对其内部金属氧化物(metal-oxide-semiconductor,MOS)敏感器件的干扰机理,基于集成电路电磁传导抗扰度模型(integrate circuit immunity model-conducted immunity,ICIM-CI),将环境热应力干扰因素引入GPIO电磁抗扰预测分析中,建立传导抗扰度-热效应仿真预测模型(ICIM-CI-temperature,ICIM-CI-T),设计基于电磁干扰直接功率注入(direct power injection,DPI)与热应力耦合的抗扰度测试平台,仿真与测试得到了对应的抗扰度阈值变化曲线.结果表明,在10 MHz~1 GHz频率范围内,模型仿真与测试结果一致性好.在环境热应力从20℃变化到100℃过程中,当频率小于200 MHz时,GPIO电磁抗扰度基本不受热应力影响;在200~700 MHz频段内,GPIO电磁抗扰度随着热应力干扰的增加而降低,其中300 MHz和600 MHz频点处的抗扰度阈值下降4 dBmw,也是该FPGA需要重点防护的频段.

Due to the electromagnetic immunity drift problems of integrated circuit in complex electromagnetic environment,we study the influence of ambient thermal stress on the GPIO electromagnetic immunity of typical digital logic circuit.The typical FPGA GPIO electrical topology structure and the disturbance mechanism of electromagnetic-thermal coupling stress on internal MOS devices is analyzed.And the environmental thermal stress interference factor is introduced into the prediction and analysis of electromagnetic immunity and the conducted immunity-thermal effect model ICIM-CI-T is built which is based on the integrated circuit electromagnetic conducted immunity model ICIM-CI.Then,the immunity test platform based on direct power injection of electromagnetic interference coupled with thermal stress is designed and the immunity threshold curve of simulation and measurement is obtained.The result show that the simulations are consistent well with the measurements within the frequency range of 10 MHz-1 GHz.During the ambient thermal stress is changed from 20℃to 100℃,the thermal stress seems to have no effect on the immunity of GPIO when the frequency is less than 200MHz,and it decreases with the increase of thermal stress interference within the frequency range of 200 MHz-700 MHz,especially,the immunity threshold decreases by 4 dBmw at 300 MHz and 600 MHz.