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基于FPGA的LU分解算法对电路的快速测算

更新时间:2020-10-27 12:31:47 大小:2M 上传用户:zhengdai查看TA发布的资源 标签:fpga 下载积分:1分 评价赚积分 (如何评价?) 收藏 评论(0) 举报

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风电发电机组的并网测试需要半实物测试平台进行电路仿真。高频性能和电路规模一直是评价测试平台性能的主要指标。在解算电路问题上,LU分解的快慢影响着导纳线性方程的求解时间。针对于这个方向,本文探讨了采用预选算法和块矩阵并结合FPGA平台的并行运算模式。本次实验通过分别对比大型稀疏矩阵和小型稠密矩阵在传统LU解法和并行方法下通过实验证明预选并行的合理性。实验还进一步显示了对于大型电路导纳矩阵,该算法的复杂度为O(n^3)/k^3,而对于一般2n阶导纳矩阵,该算法同样可在电路维度增加的时候,保持LU分解时间不受影响,体现了并行算法的优越性。因此,LU预选择分块算法对电力半实物测试平台具有现实意义。

Wind power generators always require the circuit simulation of HiL test platform. The performance in the high frequency and circuit scale has been the main requirements of evaluating the test platform. In solving the circuit problem,the speed of LU factorization affects the solution time of the admittance linear equation. In this direction,this paper discusses the parallel operation method of FPGA platform by using selected algorithm model and block matrix calculation. This experiment proves the rationality of pre-selected theory by comparing the experiments of large sparse matrix and small dense matrix compared between the traditional LU solution and parallel method. Furthermore,this experiment shows that for the large circuit admittance matrix,the complexity of the algorithm is O(n 3 )/k 3 ,and for the general 2n order admittance matrix,with the dimension of the circuit increases,the algorithm can also limit the simulation time without effected obviously,which embodies the superiority of the parallel algorithm. Therefore,LU selected block algorithm is of practical significance for the electrical HiL test platform.

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基于FPGA的LU分解算法对电路的快速测算.pdf 2M

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