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ARM Memory Barrier guide for Cortex-M

更新时间:2020-03-08 07:56:01 大小:687K 上传用户:nobugme查看TA发布的资源 标签:arm 下载积分:2分 评价赚积分 (如何评价?) 打赏 收藏 评论(0) 举报

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The ARM Cortex-M processors are high performance, low cost, low power, 32-bit RISC processors, designed for microcontroller applications. The range includes the Cortex-M3, Cortex-M4, Cortex-M0, Cortex-M0+, and Cortex-M1 processors. The Cortex-M1 processor is targeted at implementation in FPGA devices. Cortex-M processors differ from other ARM processors, including the Cortex-A/R processors, because they only execute Thumb instructions. They are based on the ARMv7-M and ARMv6-M architectures and have an efficient instruction pipeline, with low-latency Interrupt Service Routine (ISR) entry and exit. The Cortex-M3 and Cortex-M4 processors also include hardware divide and Multiply Accumulate (MAC) operations.

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文件名 大小
DAI0321A_programming_guide_memory_barriers_for_m_profile.pdf 687K

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