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基于忆阻器的混合CMOS乘法器设计
资料介绍
忆阻器作为第4种基本电路元件,拥有不同于电阻、电容、电感的特质。为了研究忆阻器在数字电路中的应用,设计了一个基于忆阻器和传统的CMOS反相器的2×2乘法器。首先,建立基于忆阻器的基本逻辑门电路。然后,由基本逻辑门搭建乘法器。利用忆阻器的纳米级尺寸、低功耗、非易失性、开关速度快等优点,所设计的乘法器比传统的CMOS构建的乘法器尺寸更小,电路的功耗更低。
As the fourth basic circuit component, memristor has different characteristics from resistance, capacitance and inductance. In order to study the application of memristor in digital circuit, a 2×2 multiplier based on memristors and traditional CMOS inverters is designed. Firstly, the basic logic gates based on memristors is built. Then, the multiplier is built by the basic logic gates. Taking full advantage of the nanoscale size, low power consumption, non-volatility, and fast switching speed of the memristor, the designed multiplier is smaller than the conventional CMOS built multiplier, and the power consumption of the circuit is lower.
部分文件列表
| 文件名 | 大小 |
| 基于忆阻器的混合CMOS乘法器设计.pdf | 617K |
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