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闭环电容式微加速度计全差分CMOS接口电路
资料介绍
提出了一种用于电容式微加速度计的低噪声、高线性度全差分接口电路。基于开关电容检测技术,该电路采用一种新的双路反馈结构来提高系统线性度,并采用2um n阱CMOS工艺完成芯片设计。仿真结果证明,电路中采用的双路反馈和全差分检测结构使系统的线性度达到0.01%。加入经过优化设计的比例-微分-积分控制器后,有效减小了系统稳态误差,系统响应速度提高了31%,系统线性度提高了66.7%。在±5V工作电压下,选取64kHz作为电路采样频率时,其电路等效输入噪声为8ug·Hz-1/2,系统灵敏度为1.22V/g,线性度为0.03%,测量范围为±2g。测试结果显示,提出的电路达到高精度微加速度计系统设计要求,可以应用到地震监测、石油勘探等领域中。
A CMOS full differential interface circuit with low noise and high linearity was presented for closed-loop capacitive micro-accelerometers. Based on switched-capacitor detection, the circuit was designed to improve its linearity by a 0.5 um n-well CMOS process technology. The simulation result shows that the proposed two-path feedback structure provides a good system linearity of 0.01%. The optimized designed PID controller was added into the system, which decreases the stabilization error effectively, increases the system responding speed by31%, and the linearity by 66. 7%. Witha -4-5 V supply and a sampling frequency of ...
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文件名 | 大小 |
闭环电容式微加速度计全差分CMOS接口电路.pdf | 374K |
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