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CMOS电路总剂量效应最劣偏置甄别
资料介绍
采用电路分析和解析建模方法研究了CMOS电路中甄别总剂量效应最劣辐照与测试偏置的问题。通过引人小规模模拟电路和数字电路的例子进行具体分析，狭取了小同电路的最劣偏置情况。对于数字电路，引入了敏感因子的概念用于定量计算不同辐照与测试偏置组合下电路的总剂量效应敏感程度。利用实测数据或电路仿真结果对甄别结果进行了一一验证，得到相一致的结论，证明了该研究思路的正确性。
Using circuit analysis and theoretical modeling, the problem of identifying worst-case irradiation and test bias for total ionizing dose （TID） effect of CMOS circuits is studied. Small scale analog and digital circuits are introduced and analyzed, thus worst case bias conditions are identified step by step. To digital circuits, the concept of the sensitive factor is introduced to calculate the sensitive level of circuits to TID effect under different combinations of bias during irradiation and during test. The re suits are validated and verified by experimental tests or circuit simulation, which proves the rationality of the identification meth od.
部分文件列表
| 文件名 | 大小 |
| CMOS电路总剂量效应最劣偏置甄别.pdf | 324K |
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