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一种14位高速DAC的电路设计

更新时间:2020-06-19 10:48:19 大小:729K 上传用户:xiaohei1810查看TA发布的资源 标签:DAC电路设计 下载积分:5分 评价赚积分 (如何评价?) 打赏 收藏 评论(0) 举报

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设计了一个14位电流定标数模转换器,采用4+4+6分段译码电流舵结构.高4位与中间4位采用温度计编码控制,低6位采用直接控制二进制加权电流源,提高了DAC的动态特性。给出了DAC的核心模块的详细设计,包括高精度可编程基准电流源,DAC编解码电路,电流源阵列。采用SMIC0.18urn1P6M设计,CMOS工艺实现。Hspice仿真测试结果表明,在400MHz工作频率下,输出信号为80MHz时,无杂散动态范围为72.47dB,设计满足要求。

Presented in this paper is a 14-bit current scaling DAC, which employs 4+4+6 segmented current- steering architecture. The high 4 bit and intermediate 4 bit adopt thermometer code control, and the low 6 bit uses direct control of binary weighted current source, so the dynamic performance of DAC is improved. The de- tailed design of the core modules of DAC is also presented, including high-precision programmable reference current source, DAC encoding and decoding circuit, and the current source array. The DAC is fabricated in SMIC 0.18urn IP6M with CMOS Hspice simulation results show that when working frequency is at 400MHz, when output signal is at 80MHz, and when spurious free dynamic range is 72.47 dB,...

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一种14位高速DAC的电路设计.pdf 729K

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