ST7565S驱动芯片资料

Direct display of RAM data through the display data RAM. z RAM capacity : 65 x 132 = 8580 bits z Display duty selectable by select pin 1/65 duty : 65 common x 132 segment 1/49 duty : 49 common x 132 segment 1/33 duty : 33 common x 132 segment 1/55 duty : 55 common x 132 segment 1/53 duty : 53 common x 132 segment z High-speed 8-bit MPU interface (The chip can be connected directly to the both the 80x86 series MPUs and the 68000 series MPUs) /Serial interfaces are supported. z Abundant command functions Display data Read/Write, display ON/OFF, Normal/ Reverse display mode, page address set, display start line set, column address set, status read, display all points ON/OFF, LCD bias set, electronic volume, read/modify/write, segment driver direction selects, power saver, static indicator, common output status select, V5 voltage regulation internal resistor ratio set. z Static drive circuit equipped internally for indicators. (1 system, with variable flashing speed.) z Low-power liquid crystal display power supply circuit equipped internally. Booster circuit (with Boost ratios of 2X/3X/4X/5X/6X , where the step-up voltage reference power supply can be input externally). High-accuracy voltage adjustment circuit (Thermal gradient –0.05%/°C ) V5 voltage regulator resistors equipped internally, V1 to V4 voltage divider resistors equipped internally, electronic volume function equipped internally, voltage follower. z CR oscillator circuit equipped internally (external clock can also be input) z Extremely low power consumption Operating power when the built-in power supply is used (an example) 60uA (VDD – VSS = VDD – VSS2 =3.0 V, Quad voltage, V5 – VDD = – 11.0 V). Conditions: When displays pattern OFF and the normal mode is selected. z Power supply operate on the low 1.8 voltage Logic power supply VDD – VSS = 1.8V to 3.3 V (+10% Range) Boost reference voltage: VDD – VSS2 = 1.8V to 3.3V Booster maximum voltage limited VOUT= -13V (+10% Range) Liquid crystal drive power supply: VDD – V5 = 4.0V to 13.0 V z Wide range of operating temperatures: –40 to 85°C z CMOS process z Shipping forms include bare chip and TCP. z These chips not designed for resistance to light or resistance to radiation. Data transfer at a higher speed is ensured since the MPU is required to satisfy the cycle time (tCYC) requirement alone in accessing the ST7565S. Wait time may not be considered. And, in the ST7565S, each time data is sent from the MPU, a type of pipeline process between LSIs is performed through the bus holder attached to the internal data bus. Internal data bus. For example, when the MPU writes data to the display data RAM, once the data is stored in the bus holder, then it is written to the display data RAM before the next data write cycle. Moreover, when the MPU reads the display data RAM,