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提升LED驱动芯片视觉刷新率的逻辑电路设计
资料介绍
为了提升LED显示屏的画面质量,设计了能提高LED显示屏视觉刷新率的逻辑电路。该电路将一个显示周期分为32段,每一段包含有128个灰度时钟周期,占空比由12位灰度数据控制。逻辑电路产生的PWM和传统的PWM相比能提高视觉刷新率,最高能将视觉刷新率提高至32倍;能弥补S-PWM（Scrambled-PWM）在灰度数据低时视觉刷新率低的不足。在Cadence软件下进行设计仿真,并在开发板上进行了验证设计的可行性。
In order to improve the quality of image of LED display,a logic circuit which can improve the LED display visual refresh rate was designed. A display cycle can be divided into 32 segments in the circuit,each segment consists of 128 gray clocks cycle,and duty cycle is controlled by 12 bit gray-scale data. Compared with traditional PWM and S-PWM,the logic circuit of PWM can improve visual refresh rate,the maximum visual refresh rate can be increased 32 times; and it can also make up shortcoming of the S-PWM（ Scrambled-PWM） when at low gray-scale data. Simulation in Cadence software and verified the feasibility of the design on the development board.
部分文件列表
| 文件名 | 大小 |
| 提升LED驱动芯片视觉刷新率的逻辑电路设计.pdf | 908K |
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