推荐星级：
- 1
- 2
- 3
- 4
- 5
数字音频总线硬件设计与仿真
资料介绍
利用现场可编程门阵列（FPGA）设计实现I^2S数字音频接口，并利用仿真软件通过各种码率进行仿真测试，同时搭建实际的硬件测试平台进行测试，结果表明，该硬件系统设计能满足实时性要求，并能提供较好的功效比，为基带处理器的专用集成电路（ASIC）设计提供了良好的参考作用。
An I^2S digital audio interface has been fabricated based on FPGA design. The simulation test has been carried out under different bit rates by using the simulation software, while the practical hardware test platform has been fabricated for module testing. The results show that the proposed module can achieve real-time decoding with high-efficient and less energy consumption. The ideas of hardware platform can provide a reference for the ASIC de- sign of audio sub-system.
部分文件列表
| 文件名 | 大小 |
| 数字音频总线硬件设计与仿真.pdf | 459K |
全部评论(0)