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DS26C32AT DS26C32AM Quad Differential Line Receive

更新时间：2020-09-01 19:53:17 大小：951K 上传用户：xzxbybd查看TA发布的资源 标签：ds26c32at 下载积分：2分 评价赚积分 （如何评价?） 打赏 收藏 评论(0) 举报

资料介绍

DS26C32AT/DS26C32AM Quad Differential Line Receiver


1FEATURES DESCRIPTION

The DS26C32A is a quad differential line receiver 2• CMOS Design for Low Power

designed to meet the RS-422, RS-423, and Federal

• ±0.2V Sensitivity over Input Common Mode Standards 1020 and 1030 for balanced and

Voltage Range unbalanced digital data transmission, while retaining

• Typical Propagation Delays: 19 ns the low power characteristics of CMOS.

• Typical Input hysteresis: 60 mV The DS26C32A has an input sensitivity of 200 mV

• Inputs Won't Load Line When VCC = 0V over the common mode input voltage range of ±7V.

• Meets the Requirements of EIA Standard RS- The DS26C32A features internal pull-up and pull422

down resistors which prevent output oscillation on

unused channels.

• TRI-STATE Outputs for Connection to System

Buses The DS26C32A provides an enable and disable

function common to all four receivers. It also features

• Available in Surface Mount TRI-STATE outputs with 6 mA source and sink

• Mil-Std-883C Compliant capability. This product is pin compatible with the

DS26LS32A and the AM26LS32.

Logic Diagram

1

Please be


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