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CMOS高速低功耗LVDS驱动电路设计
资料介绍
随着半导体技术的发展,芯片接口的数据传输率制约着芯片性能的提升,采用低压差分接口能够有效提升接口的数据传输率、降低接口功耗并抑制传输噪声。文中介绍了典型的低压差分接口电路及其工作原理,并在此基础上对低压差分接口电路进行了重新设计。设计的低压差分接口电路能够工作在1.8V,数据传输率达1.6Gb/s,功耗0.45mW。
With the development of semiconductor technology,data transferring rate of interface circuit limits the chip performance.LVDS circuits have the potential to improve data transferring rate,reduce power consumption and suppress noise of interface circuit.In this paper,the typical LVDS circuits and its operation principle were introduced,and then the LVDS circuits was redesigned.The promoted LVDS circuits could work at 1.8V,while its data transferring rate could reach 1.6Gb/s with power consumption of 0.45 mW.
部分文件列表
| 文件名 | 大小 |
| CMOS高速低功耗LVDS驱动电路设计.pdf | 986K |
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