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逐次逼近型ADC的数字接口设计

更新时间：2020-07-20 05:56:19 大小：2M 上传用户：守着阳光1985 查看TA发布的资源 标签：adc 数字接口 下载积分：5分评价赚积分（如何评价?）收藏评论(0) 举报

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逐次逼近型模数转换器,因其逐次逼近型寄存器而称为SARADC,广泛运用于要求最高18位分辨率和最高5 MSPS速率的应用中。其优势包括尺寸小、功耗低、无流水线延迟和易用。主机处理器可以通过多种串行和并行接口（如SPI、I^2C和LVDS）访问或控制ADC。讨论了一种可靠、完整数字接口的设计技术,包括数字电源电平和序列、启动期间的I/O状态、接口时序、信号质量以及数字活动导致的误差。

The successive approximation analog-to-digital converter is called SARADC because of its successive approximation register. It is widely used in the applications which require the highest 18 bit resolution and the highest 5 MSPS rate. Its advantages include small size, low power consumption, no pipeline delay and easy to use. The host processor can access or control ADC through a variety of serial and parallel interfaces, such as SPI, 12C, and LVDS. This paper will discuss the design technology of reliable and complete digital interface, including digital power level and sequence, I/O state during startup, interface timing, signal quality and error caused by digital activity.