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xilinx FPGA利用MET平台测试PCIe IP核的说明文档与源文件
资料介绍
xilinx FPGA利用MET平台测试PCIe IP核的说明文档与源文件
部分文件列表
| 文件名 | 大小 |
| xapp1022/bitstreams/ | |
| xapp1022/bitstreams/Spartan6_x8_gen1_ml605.bit | |
| xapp1022/bitstreams/Virtex5_ML555/ | |
| xapp1022/bitstreams/Virtex5_ML555/PROM_FILES/ | |
| xapp1022/bitstreams/Virtex5_ML555/PROM_FILES/Block_Plus_x4_x8_verilog.cfi | |
| xapp1022/bitstreams/Virtex5_ML555/PROM_FILES/Block_Plus_x4_x8_verilog.mcs | 1138KB |
| xapp1022/bitstreams/Virtex5_ML555/PROM_FILES/Block_Plus_x4_x8_verilog.prm | 1KB |
| xapp1022/bitstreams/Virtex5_ML555/PROM_FILES/Block_Plus_x4_x8_verilog.sig | |
| xapp1022/bitstreams/Virtex5_ML555/PROM_FILES/Block_Plus_x4_x8_vhdl.cfi | |
| xapp1022/bitstreams/Virtex5_ML555/PROM_FILES/Block_Plus_x4_x8_vhdl.mcs | 1209KB |
| xapp1022/bitstreams/Virtex5_ML555/PROM_FILES/Block_Plus_x4_x8_vhdl.prm | 1KB |
| ... | |
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