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Xilinx FPGA开发PCIe BMD DMA的Verilog HDL源码.rar
资料介绍
Xilinx FPGA开发PCIe BMD DMA的Verilog HDL源码.rar
部分文件列表
| 文件名 | 文件大小 | 修改时间 |
| BMD/BMD_128_RX_ENGINE.v | 47KB | 2009-10-22 13:28:40 |
| BMD/BMD_128_TX_ENGINE.v | 28KB | 2009-10-22 13:28:40 |
| BMD/BMD_32_RX_ENGINE.v | 16KB | 2009-11-10 19:37:36 |
| BMD/BMD_32_TX_ENGINE.v | 28KB | 2009-11-10 19:37:36 |
| BMD/BMD_64_RX_ENGINE.v | 17KB | 2009-10-22 13:28:40 |
| BMD/BMD_64_TX_ENGINE.v | 27KB | 2009-10-22 13:28:40 |
| BMD/common/BMD.v | 12KB | 2009-10-22 13:28:40 |
| BMD/common/BMD_CFG_CTRL.v | 5KB | 2009-10-22 13:28:40 |
| BMD/common/BMD_EP.v | 25KB | 2009-10-22 13:28:40 |
| BMD/common/BMD_EP_MEM.v | 25KB | 2009-10-22 13:28:40 |
| BMD/common/BMD_EP_MEM_ACCESS.v | 17KB | 2009-10-22 13:28:40 |
| ... | ||
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