推荐星级:
- 1
- 2
- 3
- 4
- 5
VHDL语言数字时钟设计 FPGA CPLD
资料介绍
VHDL语言数字时钟设计 FPGA CPLD
部分文件列表
文件名 | 文件大小 | 修改时间 |
50604/jishu.vhd | 9KB | 2008-10-27 21:04:24 |
50604/jishuqi.vhd | 1KB | 2008-11-01 15:10:38 |
50604/jishuset.vhd | 2KB | 2008-11-03 10:19:32 |
50604/saomiao.vhd | 1KB | 2008-11-04 19:45:14 |
50604/set.vhd | 1KB | 2008-11-02 11:44:52 |
50604/shuzi.vhd | 1KB | 2008-11-05 08:48:58 |
50604/zhuanhuan.vhd | 1KB | 2008-11-04 23:37:58 |
50604/jishuset.acf | 15KB | 2008-11-04 22:39:38 |
50604/shuzishizh.rpt | 76KB | 2008-11-05 08:49:30 |
50604/shuzi(5).cnf | 21KB | 2008-11-03 16:06:24 |
50604/shuzi(6).cnf | 15KB | 2008-11-03 16:06:24 |
... |
全部评论(0)