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Verilog HDL FPGA PS2时序控制接口源代码.rar
资料介绍
Verilog HDL FPGA PS2时序控制接口源代码.rar
部分文件列表
| 文件名 | 文件大小 | 修改时间 |
| ps2verilog/db/ps2_key.db_info | 1KB | 2007-12-08 21:23:02 |
| ps2verilog/db/ps2_key.eco.cdb | 1KB | 2007-12-08 21:23:02 |
| ps2verilog/db/ps2_key.sld_design_entry.sci | 1KB | 2007-12-08 21:23:02 |
| ps2verilog/my_uart_tx.v | 3KB | 2007-12-08 21:23:02 |
| ps2verilog/ps2scan.v | 4KB | 2007-12-08 21:23:02 |
| ps2verilog/ps2_key.done | 1KB | 2007-12-08 21:23:02 |
| ps2verilog/ps2_key.dpf | 1KB | 2007-12-08 21:23:02 |
| ps2verilog/ps2_key.fit.smsg | 1KB | 2007-12-08 21:23:02 |
| ps2verilog/ps2_key.fit.summary | 1KB | 2007-12-08 21:23:02 |
| ps2verilog/ps2_key.jpg | 32KB | 2007-12-08 21:23:02 |
| ps2verilog/ps2_key.map.summary | 1KB | 2007-12-08 21:23:02 |
| ... | ||
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