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stm32f407参考手册
资料介绍
st官方的stm32f407zg参考手册。
部分文件列表
| 文件名 | 大小 |
| STM32F407ZGT6.pdf | 2M |
部分页面预览
（完整内容请下载后查看）STM32F405xx
STM32F407xx
ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM,
USB OTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 15 comm. interfaces & camera
Features
FBGA
■ Core: ARM 32-bit Cortex™-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 168 MHz,
memory protection unit, 210 DMIPS/
1.25 DMIPS/MHz (Dhrystone 2.1), and DSP
instructions
LQFP64 (10 × 10 mm)
LQFP100 (14 × 14 mm)
LQFP144 (20 × 20 mm)
LQFP176 (24 × 24 mm)
UFBGA176
WLCSP90
(10 × 10 mm)
■ Up to 140 I/O ports with interrupt capability
– Up to 136 fast I/Os up to 84 MHz
– Up to 138 5 V-tolerant I/Os
■ Memories
■ Up to 15 communication interfaces
– Up to 1 Mbyte of Flash memory
2
– Up to 3 × I C interfaces (SMBus/PMBus)
– Up to 192+4 Kbytes of SRAM including 64-
Kbyte of CCM (core coupled memory) data
RAM
– Flexible static memory controller
supporting Compact Flash, SRAM,
PSRAM, NOR and NAND memories
– Up to 4 USARTs/2 UARTs (10.5 Mbit/s,
ISO 7816 interface, LIN, IrDA, modem
control)
– Up to 3 SPIs (37.5 Mbits/s), 2 with muxed
2
full-duplex I S to achieve audio class
accuracy via internal audio PLL or external
■ LCD parallel interface, 8080/6800 modes
clock
■ Clock, reset and supply management
– 1.8 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– 2 × CAN interfaces (2.0B Active)
– SDIO interface
■ Advanced connectivity
– 4-to-26 MHz crystal oscillator
– USB 2.0 full-speed device/host/OTG
– Internal 16 MHz factory-trimmed RC (1%
controller with on-chip PHY
accuracy)
– USB 2.0 high-speed/full-speed
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
device/host/OTG controller with dedicated
DMA, on-chip full-speed PHY and ULPI
●
Low power
– Sleep, Stop and Standby modes
– 10/100 Ethernet MAC with dedicated DMA:
supports IEEE 1588v2 hardware, MII/RMII
■ 8- to 14-bit parallel camera interface up to
– V
supply for RTC, 20×32 bit backup
BAT
54 Mbytes/s
registers + optional 4 KB backup SRAM
■ 3×12-bit, 2.4 MSPS A/D converters: up to 24
channels and 7.2 MSPS in triple interleaved
mode
■ True random number generator
■ CRC calculation unit
■ 96-bit unique ID
■ 2×12-bit D/A converters
■ RTC: subsecond accuracy, hardware calendar
■ General-purpose DMA: 16-stream DMA
controller with FIFOs and burst support
Table 1.
Device summary
■ Up to 17 timers: up to twelve 16-bit and two 32-
bit timers up to 168 MHz, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input
Reference
Part number
STM32F405xx STM32F405RG, STM32F405VG, STM32F405ZG
STM32F407VG, STM32F407IG, STM32F407ZG,
STM32F407xx
STM32F407VE, STM32F407ZE, STM32F407IE
■ Debug mode
– Serial wire debug (SWD) & JTAG interfaces
– Cortex-M4 Embedded Trace Macrocell™
1. The WLCSP90 package will soon be available.
January 2012
Doc ID 022152 Rev 2
1/167
1
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