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Electronic Devices and Circuit Theory 11th Edition

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SIGNIFICANT EQUATIONS  
Semiconductor Diodes W = QV, 1 eV = 1.6 * 10-19 J, ID = Is (eV >nV - 1 ) , VT = kT>q, TK = TC + 273Њ,  
D
T
1
k = 1.38 * 10-23 J/K, VK Х 0.7 V (Si), VK Х 0.3 V ( G e ) , VK Х 1.2 V (GaAs), RD = VD>ID, rd = 26 mV>ID, rav = Vd>Id ͉  
,
pt. to pt.  
PD = VD ID, TC = (VZ >VZ)>(T1 - T0) * 100%>ЊC  
2
Diode Applications Silicon: VK Х 0.7 V, germanium: VK Х 0.3 V, GaAs: VK Х 1.2 V; half-wave: Vdc = 0.318Vm;  
full-wave: Vdc = 0.636Vm  
3
Bipolar Junction Transistors IE = IC + IB, IC = ICmajority + ICOminority, IC Х IE, VBE = 0.7 V, adc = IC>IE, IC = aIE + ICBO  
,
aac = IC>IE, ICEO = ICBO>(1 - a), bdc = IC>IB, bac = IC>IB, a = b>(b + 1), b = a>(1 - a), IC = bIB, IE = (b + 1)IB,  
PCmax = VCE C  
I
4
DC Biasing—BJTs In general: VBE = 0.7 V, IC Х IE, IC = bIB; fixed-bias: IB = (VCC - VBE)>RB,VCE = VCC - ICRC,  
ICsat = VCC>RC; emitter-stabilized: IB = (VCC - VBE)>(RB + (b + 1)RE), Ri = (b + 1)RE, VCE = VCC - IC(RC + RE) ,  
ICsat = VCC>(RC + RE); voltage-divider: exact: RTh = R1  
ʈ
R2, ETh = R2VCC>(R1 + R2), IB = (ETh - VBE)>(RTh + (b + 1)RE),  
VCE = VCC - IC(RC + RE), approximate: bRE Ú 10R2, VB = R2VCC>(R1 + R2), VE = VB - VBE, IC Х IE = VE>RE; voltage-feedback:  
IB = (VCC - VBE)>(RB + b(RC + RE)); common-base: IB = (VEE - VBE)>RE; switching transistors: ton = tr + td, toff = ts + tf;  
stability: S(ICO) = IC>ICO; fixed-bias: S(ICO) = b + 1; emitter-bias: S(ICO) = (b + 1)(1 + RB>RE)>(1 + b + RB>RE) ;  
voltage-divider: S(ICO) = (b + 1)(1 + RTh>RE)>(1 + b + RTh>RE); feedback-bias: S(ICO) = (b + 1)(1 + RB>RC)>(1 + b + RB>RC) ,  
S(VBE) = IC>VBE; fixed-bias: S(VBE) = -b>RB; emitter-bias: S(VBE) = -b>(RB + (b + 1)RE); voltage-divider: S(VBE) =  
-b>(RTh + (b + 1)RE); feedback bias: S(VBE) = -b>(RB + (b + 1)RC), S(b) = IC>b; fixed-bias: S(b) = IC >b1;  
1
emitter-bias: S(b) = IC (1 + RB>RE)>( b1(1 + b2 + RB>RE)); voltage-divider: S(b) = IC (1 + RTh>RE)>(b1(1 + b2 + RTh>RE));  
1
1
feedback-bias: S(b) = IC (1 + RB>RC)>(b1(1 + b2 + RB>RC)), IC = S(ICO) ICO + S(VBE) VBE + S(b) b  
1
5
BJT AC Analysis re = 26 mV>IE; CE fixed-bias: Zi Х bre, Zo Х RC, Av = -RC>re; voltage-divider bias: Zi = R1  
ʈ
R2  
ʈ
bre, Zo Х RC,  
Av = -RC>re; CE emitter-bias: Zi Х RB  
ʈ
bRE, Zo Х RC, Av Х -RC>RE; emitter-follower: Zi Х RB  
ʈ
bRE, Zo Х re, Av Х 1 ;  
common-base: Zi Х RE  
ʈ
re, Zo Х RC, Av Х RC>re; collector feedback: Zi Х re>(1>b + RC>RF), Zo Х RC  
ʈ
RF, Av = -RC>re; collector  
dc feedback: Zi Х RF1 ʈ bre, Zo Х RC  
ʈ
RF , Av = -(RF2 ʈ RC)>re; effect of load impedance: Av = RLAv >(RL + Ro), Ai = -AvZi>RL;  
NL  
2
effect of source impedance: Vi = RiVs>(Ri + Rs) , Av = RiAv >(Ri + Rs), Is = Vs>(Rs + Ri); combined effect of load and source  
NL  
s
impedance: Av = RLAv >(RL + Ro) , Av = (Ri>(Ri + Rs))(RL>(RL + Ro))Av , Ai = -AvRi>RL, Ai = -Av (Rs + Ri)>RL; cascode  
NL  
NL  
s
s
s
connection: Av = Av Av ; Darlington connection: bD = b1b2; emitter-follower configuration: IB = (VCC - VBE)>(RB + bDRE),  
1
2
IC Х IE Х bDIB, Zi = RB  
ʈ
b1b2RE, Ai = bDRB>(RB + bDRE), Av Х 1, Zo = re >b2 + re ; basic amplifier configuration: Zi = R1  
ʈ
R2  
ʈ
ZiЈ,  
1
2
ZiЈ = b1(re + b2re ), Ai = bD(R1  
ʈ
R2)>(R1  
ʈ
R2 + ZiЈ), Av = bDRC>ZiЈ, Zo = RC  
ʈ
ro ; feedback pair: IB = (VCC - VBE )>(RB + b1b2RC),  
1
2
2
1
1
Zi = RB  
ʈ
ZiЈ, ZiЈ = b1re + b1b2RC, Ai = -b1b2RB>(RB + b1b2RC) Av = b2RC>(re + b2RC) Х 1, Zo Х re >b2.  
1
1
6
Field-Effect Transistors IG = 0 A, ID = IDSS(1 - VGS>VP)2, ID = IS , VGS = VP (1 - 2ID>IDSS), ID = IDSS>4 (if VGS = VP>2),  
ID = IDSS>2 (if VGS Х 0.3 VP) , PD = VDSID, rd = ro>(1 - VGS>VP)2; MOSFET: ID = k(VGS - VT)2, k = ID(on) >(VGS(on) - VT)2  
7
FET Biasing Fixed-bias: VGS = -VGG, VDS = VDD - IDRD; self-bias: VGS = -IDRS, VDS = VDD - ID(RS + RD) , VS = IDRS;  
voltage-divider: VG = R2VDD>(R1 + R2), VGS = VG - IDRS, VDS = VDD - ID(RD + RS); common-gate configuration: VGS = VSS - IDRS,  
VDS = VDD + VSS - ID(RD + RS); special case: VGS = 0 V: II = IDSS, VDS = VDD - IDRD, VD = VDS, VS = 0 V. enhancement-type  
Q
Q
MOSFET: ID = k(VGS - VGS(Th))2, k = ID(on)>(VGS(on) - VGS(Th))2; feedback bias: VDS = VGS, VGS = VDD - IDRD; voltage-divider:  
0
0
0
0
VG = R2VDD>(R1 + R2), VGS = VG - IDRS; universal curve: m = VP >IDSSRS, M = m * VG> VP ,VG = R2VDD>(R1 + R2)  
8
FET Amplifiers gm = yfs = ID>VGS, gm0 = 2IDSS >͉VP͉, gm = gm0(1 - VGS>VP) , gm = gm0 1ID>IDSS, rd = 1>yos  
=
0
VDS>ID V =constant; fixed-bias: Zi = RG, Zo Х RD, Av = -gmRD; self-bias (bypassed Rs): Zi = RG, Zo Х RD, Av = -gmRD; self-bias  
GS  
(unbypassed Rs): Zi = RG, Zo = RD, Av Х -gmRD>(1 + gmRs); voltage-divider bias: Zi = R1  
ʈ R2, Zo = RD, Av = -gmRD; source follower:  
Zi = RG, Zo = RS  
ʈ
1>gm, Av Х gmRS>(1 + gmRS); common-gate: Zi = RS  
ʈ
1>gm, Zo Х RD, Av = gmRD; enhancement-type MOSFETs:  
gm = 2k(VGS - VGS(Th)); drain-feedback configuration: Zi Х RF>(1 + gmRD) , Zo Х RD, Av Х -gmRD; voltage-divider bias: Zi = R1  
ʈ
R2,  
Q
Zo Х RD, Av Х -gmRD.  
9
BJT and JFET Frequency Response l o g ea = 2.3 log10a, l o g 101 = 0 , l o g 10 a>b = log10a - log10b, l o g 101>b = -log10b,  
l o g 10ab = log10 a + log10 b, GdB = 10 log10 P2>P1, GdBm = 10 log10 P2>1 mW͉600 , GdB = 20 log10 V2>V1,  
GdB = GdB + GdB  
+
+ G Po  
= 0.5Pomid, B W = f1 - f2; low frequency (BJT): fLS = 1>2p(Rs + Ri)Cs,  
g
dBn  
T
1
2
HPF  
fLC = 1>2p(Ro + RL)CC, fLE = 1>2pReCE, Re = RE  
ʈ
(RЈ>b + re) , RЈ = Rs  
ʈ
R1  
ʈ
R2, F E T : fLG = 1>2p(Rsig + Ri)CG,  
s
s
fL = 1>2p(Ro + RL)CC , fL = 1>2pReqCS, Req = RS  
ʈ
1>gm(rd Х ϱ ⍀); Miller effect: CMi = ( 1 - Av)Cf, CMo = (1 - 1>Av)Cf;  
S
C
high frequency (BJT): fHi = 1>2pRTh Ci, RTh = Rs  
ʈ
R1  
ʈ
R2  
ʈ
Ri, Ci = Cwi + Cbe + (1 - Av)Cbc, fHo = 1>2pRTh Co,  
i
o
RTh = RC  
ʈ
RL  
ʈ
ro, Co = CW + Cce i+ CM , fb Х 1>2pbmidre(Cbe + Cbc) , fT = bmid fb; FET: fH = 1>2pRTh Ci, RTh = Rsig  
ʈ RG,  
o
o
o
i
i
i
Ci = CW + Cgs + CM , CM = (1 - Av)Cgd fH = 1>2pRTh Co, RTh = RD  
ʈ
RL  
ʈ
rd, Co = CW + Cds + CM ; CM = (1 - 1>Av)Cgd;  
i
O
i
i
o
o
o
o
o
multistage: f1Ј = f1>221>n - 1, f 2Ј = (221>n - 1)f2; square-wave testing: fH = 0.35>tr, % tilt = P% = ((V - VЈ)>V) * 100%,  
i
fLo = (P>p)fs  
10 Operational Amplifiers C M R R = Ad>Ac; CMRR(log) = 20 log10(Ad>Ac); constant-gain multiplier: Vo>V1 = -Rf >R1;  
noninverting amplifier: Vo>V1 = 1 + Rf >R1; unity follower: Vo = V1; summing amplifier: Vo = -[(Rf>R1)V1 + ( Rf>R2)V2 + (Rf>R3)V3] ;  
integrator: vo(t) = -(1>R1C1) v1dt  
1
11 Op-Amp Applications Constant-gain multiplier: A = - Rf>R1; noninverting: A = 1 + Rf>R1: voltage summing:  
Vo = -[(Rf>R1)V1 + (Rf>R2)V2 + (Rf>R3)V3]; high-pass active filter: foL = 1>2pR1C1; low-pass active filter: foH = 1>2pR1C1  
12 Power Amplifiers  
Power in: Pi = VCC CQ  
I
power out: Po = VCE C  
I
= IC2RC = VC2E>RC rms  
= VCEIC>2 = (IC2>2)RC = VC2E>(2RC) peak  
= VCEIC>8 = (IC2>8)RC = VC2E>(8RC) peak@to@peak  
efficiency: %h = (Po>Pi) * 100%; maximum efficiency: Class A, series-fed ϭ 25%; Class A, transformer-coupled ϭ 50%; Class B,  
push-pull ϭ 78.5%; transformer relations: V2>V1 = N2>N1 = I1>I2, R2 = (N2>N1)2R1; power output: Po = [(VCE  
- VCE  
)
min  
max  
2
3
4
3
4
( IC max - IC min )]>8; class B power amplifier: Pi = VCC (2>p)Ipeak ; Po = VL(peak)>(2RL); %h = (p>4) VL(peak)>VCC * 100%;  
PQ = P2Q>2 = (Pi - Po)>2; maximum Po = VC2C>2RL; m a x i m u m Pi = 2VC2C>pRL; maximum P2Q = 2VC2C>p2RL; % total harmonic  
distortion (% THD) = 2D22 + D23 + D24  
+
* 100%; heat-sink: TJ = PDuJA + TA, uJA = 40ЊC/W ( f r e e a i r ) ;  
g
PD = (TJ - TA)>(uJC + uCS + uSA  
)
13 Linear-Digital ICs Ladder network: Vo = [(D0 * 20 + D1 * 21 + D2 * 22  
+
+ Dn * 2n)>2n]Vref  
;
g
555 oscillator: f = 1.44(RA + 2RB)C; 555 monostable: Thigh = 1.1RAC; VCO: fo = (2>R1C1)[(V + - VC)>V +]; phase-  
locked loop (PLL): fo = 0.3>R1C1, fL = {8 fo>V, fC = {(1>2p)22pfL >(3.6 * 103)C2  
14 Feedback and Oscillator Circuits Af = A>(1 + bA); series feedback; Zif = Zi(1 + bA); shunt feedback: Zif = Zi>(1 + bA) ;  
voltage feedback: Zof = Zo>(1 + bA); current feedback; Zof = Zo(1 + bA); gain stability: dAf>Af = 1>(͉1 + bA͉)(dA>A); oscillator;  
bA = 1; phase shift: f = 1>2pRC16, b = 1>29, A 7 29; FET phase shift: ͉A͉ = gmRL, RL = RDrd>(RD + rd); transistor phase shift:  
f = (1>2pRC)[1>26 + 4(RC>R)], hfe 7 23 + 29(RC>R) + 4 ( R>RC); Wien bridge: R3>R4 = R1>R2 + C2>C1, fo = 1>2p1R1C1R2C2;  
tuned: fo = 1>2p 1LCeq, Ceq = C1C2>(C1 + C2), Hartley: Leq = L1 + L2 + 2M, fo = 1>2p 1LeqC  
15 Power Supplies (Voltage Regulators) Filters: r = Vr(rms)>Vdc * 100%, V.R. = (VNL - VFL)>VFL * 100%, Vdc = Vm - Vr(p@p)>2 ,  
Vr(rms) = Vr(p@p)>213, Vr(rms) Х (Idc>413)(Vdc>Vm); full-wave, light load Vr(rms) = 2.4Idc>C, Vdc = Vm - 4.17Idc>C, r =  
( 2 .4 IdcCVdc) * 100% = 2.4>RLC * 100%, Ipeak = T>T1 * Idc; RC filter: VЈ = RL Vdc>( R + RL), XC = 2.653>C(half@wave), XC  
=
dc  
1.326>C (full@wave), VrЈ(rms) = (XC>2R2 + X2C); regulators: IR = ( INL - IFL)>IFL * 100%, VL = VZ(1 + R1>R2), Vo  
=
Vref(1 + R2>R1) + IadjR2  
16 Other Two-Terminal Devices Varactor diode: CT = C(0)>(1 + ͉Vr>VT ͉)n, TC = (C>Co(T1 - T0)) * 100%; photodiode:  
C
W = hf, l = v>f, 1 lm = 1.496 * 10-10 W, 1 Å = 10-10 m, 1 fc = 1 lm>ft2 = 1.609 * 10-9 W>m2  
17 pnpn and Other Devices Diac: VBR = VBR { 0.1 VBR UJT: RBB = (RB + RB )͉ =0, VR = hVBB I  
͉
,
IE  
2
E =0  
1
2
2
h = RB >(RB + RB )͉ =0 , VP = hVBB + VD; phototransistor: IC Х hfeIl; PUT: h = RB >(RB +B1RB ),VP = hVBB + VD  
1
IE  
1
1
2
1
1
2
Electronic  
Devices and  
Circuit Theory  
Eleventh Edition  
Robert L. Boylestad  
Louis Nashelsky  
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Library of Congress Cataloging-in-Publication Data  
Boylestad, Robert L.  
Electronic devices and circuit theory / Robert L. Boylestad, Louis Nashelsky.—11th ed.  
p. cm.  
ISBN 978-0-13-262226-4  
1. Electronic circuits. 2. Electronic apparatus and appliances. I. Nashelsky, Louis. II. Title.  
TK7867.B66 2013  
621.3815—dc23  
2011052885  
10 9 8 7 6 5 4 3 2 1  
ISBN 10:  
0-13-262226-2  
ISBN 13: 978-0-13-262226-4  
DEDICATION  
To Else Marie, Alison and Mark, Eric and Rachel, Stacey and Jonathan,  
and our eight granddaughters: Kelcy, Morgan, Codie, Samantha, Lindsey,  
Britt, Skylar, and Aspen.  
To Katrin, Kira and Thomas, Larren and Patricia, and our six grandsons:  
Justin, Brendan, Owen, Tyler, Colin, and Dillon.  
This page intentionally left blank  
The preparation of the preface for the 11th edition resulted in a bit of reflection on the 40  
years since the first edition was published in 1972 by two young educators eager to test  
their ability to improve on the available literature on electronic devices. Although one may  
prefer the term semiconductor devices rather than electronic devices, the first edition was  
almost exclusively a survey of vacuum-tube devices—a subject without a single section in  
the new Table of Contents. The change from tubes to predominantly semiconductor devices  
took almost five editions, but today it is simply referenced in some sections. It is interest-  
ing, however, that when field-effect transistor (FET) devices surfaced in earnest, a number  
of the analysis techniques used for tubes could be applied because of the similarities in the  
ac equivalent models of each device.  
We are often asked about the revision process and how the content of a new edition is  
defined. In some cases, it is quite obvious that the computer software has been updated,  
and the changes in application of the packages must be spelled out in detail. This text  
was the first to emphasize the use of computer software packages and provided a level  
of detail unavailable in other texts. With each new version of a software package, we  
have found that the supporting literature may still be in production, or the manuals lack  
the detail for new users of these packages. Sufficient detail in this text ensures that a  
student can apply each of the software packages covered without additional instruc-  
tional material.  
The next requirement with any new edition is the need to update the content reflecting  
changes in the available devices and in the characteristics of commercial devices. This  
can require extensive research in each area, followed by decisions regarding depth of  
coverage and whether the listed improvements in response are valid and deserve recog-  
nition. The classroom experience is probably one of the most important resources for  
defining areas that need expansion, deletion, or revision. The feedback from students  
results in marked-up copies of our texts with inserts creating a mushrooming copy of the  
material. Next, there is the input from our peers, faculty at other institutions using the  
text, and, of course, reviewers chosen by Pearson Education to review the text. One  
source of change that is less obvious is a simple rereading of the material following the  
passing of the years since the last edition. Rereading often reveals material that can be  
improved, deleted, or expanded.  
For this revision, the number of changes far outweighs our original expectations. How-  
ever, for someone who has used previous editions of the text, the changes will probably  
be less obvious. However, major sections have been moved and expanded, some 100-plus  
problems have been added, new devices have been introduced, the number of applications  
has been increased, and new material on recent developments has been added through-  
out the text. We believe that the current edition is a significant improvement over the  
previous editions.  
As instructors, we are all well aware of the importance of a high level of accuracy  
required for a text of this kind. There is nothing more frustrating for a student than to  
work a problem over from many different angles and still find that the answer differs  
from the solution at the back of the text or that the problem seems undoable. We were  
pleased to find that there were fewer than half a dozen errors or misprints reported since  
v
 
PREFACE  
vi  
the last edition. When you consider the number of examples and problems in the text  
along with the length of the text material, this statistic clearly suggests that the text is as  
error-free as possible. Any contributions from users to this list were quickly acknowl-  
edged, and the sources were thanked for taking the time to send the changes to the pub-  
lisher and to us.  
Although the current edition now reflects all the changes we feel it should have, we  
expect that a revised edition will be required somewhere down the line. We invite you to  
respond to this edition so that we can start developing a package of ideas and thoughts that  
will help us improve the content for the next edition. We promise a quick response to your  
comments, whether positive or negative.  
NEW TO THIS EDITION  
• Throughout the chapters, there are extensive changes in the problem sections. Over 100  
new problems have been added, and a significant number of changes have been made to  
the existing problems.  
• A significant number of computer programs were all rerun and the descriptions updated  
to include the effects of using OrCAD version 16.3 and Multisim version 11.1. In addi-  
tion, the introductory chapters are now assuming a broader understanding of computer  
methods, resulting in a revised introduction to the two programs.  
• Throughout the text, photos and biographies of important contributors have been added.  
Included among these are Sidney Darlington, Walter Schottky, Harry Nyquist, Edwin  
Colpitts, and Ralph Hartley.  
• New sections were added throughout the text. There is now a discussion on the impact  
of combined dc and ac sources on diode networks, of multiple BJT networks, VMOS  
and UMOS power FETs, Early voltage, frequency impact on the basic elements,  
effect of RS on an amplifier’s frequency response, gain-bandwidth product, and a  
number of other topics.  
• A number of sections were completely rewritten due to reviewers’ comments or  
changing priorities. Some of the areas revised include bias stabilization, current  
sources, feedback in the dc and ac modes, mobility factors in diode and transistor  
response, transition and diffusion capacitive effects in diodes and transistor response  
characteristics, reverse-saturation current, breakdown regions (cause and effect), and  
the hybrid model.  
• In addition to the revision of numerous sections described above, there are a number of  
sections that have been expanded to respond to changes in priorities for a text of this  
kind. The section on solar cells now includes a detailed examination of the materials  
employed, additional response curves, and a number of new practical applications. The  
coverage of the Darlington effect was totally rewritten and expanded to include detailed  
examination of the emitter-follower and collector gain configurations. The coverage of  
transistors now includes details on the cross-bar latch transistor and carbon nanotubes.  
The discussion of LEDs includes an expanded discussion of the materials employed,  
comparisons to today’s other lighting options, and examples of the products defining  
the future of this important semiconductor device. The data sheets commonly included  
in a text of this type are now discussed in detail to ensure a well-established link when  
the student enters the industrial community.  
• Updated material appears throughout the text in the form of photos, artwork, data  
sheets, and so forth, to ensure that the devices included reflect the components avail-  
able today with the characteristics that have changed so rapidly in recent years. In  
addition, the parameters associated with the content and all the example problems are  
more in line with the device characteristics available today. Some devices, no longer  
available or used very infrequently, were dropped to ensure proper emphasis on the  
current trends.  
• There are a number of important organizational changes throughout the text to ensure  
the best sequence of coverage in the learning process. This is readily apparent in the  
early dc chapters on diodes and transistors, in the discussion of current gain in the ac  
chapters for BJTs and JFETs, in the Darlington section, and in the frequency response  
chapters. It is particularly obvious in Chapter 16, where topics were dropped and the  
order of sections changed dramatically.  
PREFACE  
vii  
INSTRUCTOR SUPPLEMENTS  
w, please visit:
and enter “Electronic Devices and Circuit Theory” in the search bar. From there,  
you will be able to register to receive an instructor’s access code. Within 48 hours after  
registering, you will receive a confirming email, including an instructor access code.  
Once you have received your code, return to the site and log on for full instructions on  
how to download the materials you wish to use.  
PowerPoint Presentation–(ISBN 0132783746). This supplement contains all figures  
from the text as well as a new set of lecture notes highlighting important concepts.  
TestGen® Computerized Test Bank–(ISBN 013278372X). This electronic bank of test  
questions can be used to develop customized quizzes, tests, and/or exams.  
Instructor’s Resource Manual–(ISBN 0132783738). This supplement contains the solu-  
tions to the problems in the text and lab manual.  
STUDENT SUPPLEMENTS  
Laboratory Manual–(ISBN 0132622459) . This supplement contains over 35 class-tested  
e
ebsite–Student study resources are available at
ACKNOWLEDGMENTS  
The following individuals supplied new photographs for this edition.  
Sian Cummings International Rectifier Inc.  
Michele Drake Agilent Technologies Inc.  
Edward Eckert Alcatel-Lucent Inc.  
Amy Flores Agilent Technologies Inc.  
Ron Forbes B&K Precision Corporation  
Christopher Frank Siemens AG  
Amber Hall Hewlett-Packard Company  
Jonelle Hester National Semiconductor Inc.  
George Kapczak AT&T Inc.  
Patti Olson Fairchild Semiconductor Inc.  
Jordon Papanier LEDtronics Inc.  
Andrew W. Post Vishay Inc.  
Gilberto Ribeiro Hewlett-Packard Company  
Paul Ross Alcatel-Lucent Inc.  
Craig R. Schmidt Agilent Technologies, Inc.  
Mitch Segal Hewlett-Packard Company  
Jim Simon Agilent Technologies, Inc.  
Debbie Van Velkinburgh Tektronix, Inc.  
Steve West On Semiconductor Inc.  
Marcella Wilhite Agilent Technologies, Inc.  
Stan Williams Hewlett-Packard Company  
J. Joshua Wang Hewlett-Packard Company  
This page intentionally left blank  
BRIEF CONTENTS  
Preface  
v
1
CHAPTER 1: Semiconductor Diodes  
CHAPTER 2: Diode Applications  
CHAPTER 3: Bipolar Junction Transistors  
CHAPTER 4: DC Biasing—BJTs  
55  
129  
160  
253  
378  
422  
481  
545  
607  
653  
683  
722  
751  
783  
811  
841  
CHAPTER 5: BJT AC Analysis  
CHAPTER 6: Field-Effect Transistors  
CHAPTER 7: FET Biasing  
CHAPTER 8: FET Amplifiers  
CHAPTER 9: BJT and JFET Frequency Response  
CHAPTER 10: Operational Amplifiers  
CHAPTER 11: Op-Amp Applications  
CHAPTER 12: Power Amplifiers  
CHAPTER 13: Linear-Digital ICs  
CHAPTER 14: Feedback and Oscillator Circuits  
CHAPTER 15: Power Supplies (Voltage Regulators)  
CHAPTER 16: Other Two-Terminal Devices  
CHAPTER 17: pnpn and Other Devices  
Appendix A: Hybrid Parameters—Graphical  
Determinations and Conversion Equations (Exact  
and Approximate)  
879  
ix  
BRIEF CONTENTS  
x
Appendix B: Ripple Factor and Voltage Calculations  
Appendix C: Charts and Tables  
885  
891  
Appendix D: Solutions to Selected  
Odd-Numbered Problems  
893  
901  
Index  
CONTENTS  
xi  
 
CONTENTS  
xii  
CONTENTS  
xiii  
CONTENTS  
xiv  
CONTENTS  
xv  
CONTENTS  
xvi  
CONTENTS  
xvii  

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全部评论(3)

  • 2019-11-14 15:42:59meng__@126.com

    考验英文水平的时候到了,有空看一看

  • 2019-10-16 14:03:54大鹏小莫

    Pearson 出版,很好的新书

  • 2019-10-14 10:07:59eagle_fei

    感谢分享资料!