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ADI 24bit A/D 模数转换器 AD7192 手册
资料介绍
ADI 24bits A/D 模数转换器，最高转换速率4800，低温漂，内置可编程放大器
部分文件列表
| 文件名 | 大小 |
| AD7192.pdf | 525K |
部分页面预览
（完整内容请下载后查看）4.8 kHz, Ultralow Noise, 24-Bit
Sigma-Delta ADC with PGA
AD7192
Temperature measurement
FEATURES
Chromatography
PLC/DCS analog input modules
Data acquisition
RMS noise: 11 nV @ 4.7 Hz (gain = 128)
15.5 noise-free bits @ 2.4 kHz (gain = 128)
Up to 22 noise-free bits (gain = 1)
Offset drift: 5 nV/°C
Medical and scientific instrumentation
Gain drift: 1 ppm/°C
Specified drift over time
GENERAL DESCRIPTION
The AD7192 is a low noise, complete analog front end for high
precision measurement applications. It contains a low noise,
24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC).
The on-chip low noise gain stage means that signals of small
amplitude can be interfaced directly to the ADC.
2 differential/4 pseudo differential input channels
Automatic channel sequencer
Programmable gain (1 to 128)
Output data rate: 4.7 Hz to 4.8 kHz
Internal or external clock
The device can be configured to have two differential inputs or
four pseudo differential inputs. The on-chip channel sequencer
allows several channels to be enabled, and the AD7192 sequentially
converts on each enabled channel. This simplifies communication
with the part. The on-chip 4.92 MHz clock can be used as the
clock source to the ADC or, alternatively, an external clock or
crystal can be used. The output data rate from the part can be
varied from 4.7 Hz to 4.8 kHz.
Simultaneous 50 Hz/60 Hz rejection
4 general-purpose digital outputs
Power supply
AVDD: 3 V to 5.25 V
DVDD: 2.7 V to 5.25 V
Current: 4.35 mA
Temperature range: –40°C to +105°C
Package: 24-lead TSSOP
The device has two digital filter options. The choice of filter
affects the rms noise/noise-free resolution at the programmed
output data rate, the settling time, and the 50 Hz/60 Hz
rejection. For applications that require all conversions to be
settled, the AD7192 includes a zero latency feature.
INTERFACE
3-wire serial
SPI, QSPI™, MICROWIRE™, and DSP compatible
Schmitt trigger on SCLK
APPLICATIONS
The part operates with a power supply from 3 V to 5.25 V. It
consumes a current of 4.35 mA. It is housed in a 24-lead TSSOP
package.
Weigh scales
Strain gage transducers
Pressure measurement
FUNCTIONAL BLOCK DIAGRAM
AGND AV
DV
DGND REFIN1(+) REFIN1(–)
DD
DD
REFERENCE
DETECT
AD7192
AV
DD
AIN1
AIN2
AIN3
DOUT/RDY
SERIAL
INTERFACE
AND
CONTROL
LOGIC
AIN4
MUX
DIN
Σ-Δ
ADC
AINCOM
PGA
SCLK
CS
SYNC
AGND
TEMP
SENSOR
P3
P2
BPDSW
CLOCK
CIRCUITRY
AGND
MCLK1 MCLK2 P0/REFIN2(–) P1/REFIN2(+)
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
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©2009 Analog Devices, Inc. All rights reserved.
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