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Verilog多功能数字钟程序
资料介绍
Verilog,多功能数字钟,FPGA编程实现，适合学习参考
部分文件列表
| 文件名 | 文件大小 | 修改时间 |
| clock/clock.bgn | 5KB | 2012-10-17 20:28:52 |
| clock/clock.bit | 71KB | 2012-10-17 20:28:52 |
| clock/clock.bld | 1KB | 2012-10-17 20:27:58 |
| clock/clock.bmm | 1KB | 2012-10-17 04:55:20 |
| clock/clock.cmd_log | 8KB | 2012-10-17 20:28:46 |
| clock/clock.drc | 1KB | 2012-10-17 20:28:50 |
| clock/clock.gise | 19KB | 2012-10-24 13:08:24 |
| clock/clock.lso | 1KB | 2012-10-17 20:27:38 |
| clock/clock.ncd | 34KB | 2012-10-17 20:28:36 |
| clock/clock.ngc | 41KB | 2012-10-17 20:27:44 |
| clock/clock.ngd | 60KB | 2012-10-17 20:27:58 |
| ... | ||
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