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STM32F767xx_Datasheet

更新时间:2019-11-14 22:30:44 大小:3M 上传用户:呆呆兔查看TA发布的资源 标签:stm32 下载积分:2分 评价赚积分 (如何评价?) 收藏 评论(0) 举报

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STM32F767xx_Datasheet,stm32f767芯片手册详情

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1573741545STM32F767xx_Datasheet.pdf 3M

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STM32F765xx STM32F767xx  
STM32F768Ax STM32F769xx  
ARM® Cortex®-M7 32b MCU+FPU, 462DMIPS, up to 2MB Flash/  
512+16+4KB RAM, USB OTG HS/FS, 28 com IF, LCD, DSI  
Datasheet - production data  
Features  
&"'!  
®
®
Core: ARM 32-bit Cortex -M7 CPU with  
DPFPU, ART Accelerator and L1-cache:  
16 Kbytes I/D cache, allowing 0-wait state  
execution from embedded Flash and external  
memories, up to 216 MHz, MPU,  
462 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1),  
and DSP instructions.  
LQFP100 (14 × 14 mm)  
LQFP144 (20 × 20 mm)  
LQFP176 (24 × 24 mm)  
UFBGA176 (10 x 10 mm)  
TFBGA216 (13 x 13 mm)  
WLCSP180  
(0.4 mm pitch)  
LQFP208 (28 x 28 mm)  
Memories  
– Up to 2 Mbytes of Flash memory organized  
into two banks allowing read-while-write  
Low-power  
– Sleep, Stop and Standby modes  
– SRAM: 512 Kbytes (including 128 Kbytes  
of data TCM RAM for critical real-time data)  
+ 16 Kbytes of instruction TCM RAM (for  
critical real-time routines) + 4 Kbytes of  
backup SRAM  
– V supply for RTC, 32×32 bit backup  
BAT  
registers + 4 Kbytes backup SRAM  
3×12-bit, 2.4 MSPS ADC: up to 24 channels  
Digital filters for sigma delta modulator  
(DFSDM), 8 channels / 4 filters  
– Flexible external memory controller with up  
to 32-bit data bus: SRAM, PSRAM,  
SDRAM/LPSDR SDRAM, NOR/NAND  
memories  
2×12-bit D/A converters  
General-purpose DMA: 16-stream DMA  
controller with FIFOs and burst support  
Dual mode Quad-SPI  
Graphics  
Up to 18 timers: up to thirteen 16-bit (1x low-  
power 16-bit timer available in Stop mode) and  
two 32-bit timers, each with up to 4  
IC/OC/PWM or pulse counter and quadrature  
(incremental) encoder input. All 15 timers  
running up to 216 MHz. 2x watchdogs, SysTick  
timer  
– Chrom-ART Accelerator (DMA2D),  
graphical hardware accelerator enabling  
enhanced graphical user interface  
– Hardware JPEG codec  
– LCD-TFT controller supporting up to XGA  
resolution  
Debug mode  
®
– MIPI DSI host controller supporting up to  
– SWD & JTAG interfaces  
®
720p 30 Hz resolution  
– Cortex -M7 Trace Macrocell  
Clock, reset and supply management  
– 1.7 V to 3.6 V application supply and I/Os  
– POR, PDR, PVD and BOR  
Up to 168 I/O ports with interrupt capability  
– Up to 164 fast I/Os up to 108 MHz  
– Up to 166 5 V-tolerant I/Os  
– Dedicated USB power  
– 4-to-26 MHz crystal oscillator  
– Internal 16 MHz factory-trimmed RC (1%  
accuracy)  
– 32 kHz oscillator for RTC with calibration  
– Internal 32 kHz RC with calibration  
August 2017  
DocID029041 Rev 5  
1/256  
This is information on a product in full production.  

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