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PB_M480_Series_EN_0613.pdf
资料介绍
Features
Core
– Up to 192 MHz ARM® Cortex®-M4F delivering 1.25 DMIPS per MHz
– DSP instruction set
– Memory Protection Unit (MPU)
Memories
– 512/256 kB zero-wait state flash memory
– 160/96 kB SRAM, including 32 kB external SPI Flash cache
– 4 kB Secure Protection ROM
– 8 kB Key Protection ROM
– 3 kB One-Time-Programmable ROM.
Cyclic Redundancy Calculation Unit
16-channel peripheral DMA controller
External Bus Interface
– LCD parallel interface, i80 mode
部分文件列表
| 文件名 | 大小 |
| 1526386652PB_M480_Series_EN_0613.pdf | 2M |
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